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公开(公告)号：US20090201100A1
公开(公告)日：2009-08-13
申请号：US12367008
申请日：2009-02-06
IPC分类号： H03H7/18
CPC分类号： H03H7/185
摘要： An inductor including a primary coil coaxially arranged and operated in parallel with isolated secondary coils each including at least one loop winding with two open-circuited ports. At least one phase shifting device is arranged between open-circuited ports of at least one secondary coil. A method to operate an inductor by combining primary and secondary coils with phase shifting devices to get a wide tuning range is also provided. The method includes the step of phase shifting open-circuited ports of at least one secondary coil.
摘要翻译： 一种电感器，包括与隔离次级线圈并联布置并并联操作的初级线圈，每个线圈包括至少一个具有两个开路端口的环绕组。 至少一个相移装置布置在至少一个次级线圈的开路端口之间。 还提供了通过将初级和次级线圈与相移装置组合以获得宽的调谐范围来操作电感器的方法。 该方法包括相移至少一个次级线圈的开路端口的步骤。
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公开(公告)号：US20080285695A1
公开(公告)日：2008-11-20
申请号：US12124106
申请日：2008-05-20
申请人： Hayden Clavie Cranford, JR. , Gareth John Nicholls , Vernon Roberts Norman , Martin Leo Schmatz , Karl David Selander , Michael Anthony Sorna
发明人： Hayden Clavie Cranford, JR. , Gareth John Nicholls , Vernon Roberts Norman , Martin Leo Schmatz , Karl David Selander , Michael Anthony Sorna
IPC分类号： H04L7/00
CPC分类号： H04L7/0337 , H03L7/091 , H03L2207/50
摘要： Methods and arrangements to determine phase adjustments for a sampling clock of a clock and data recovery (CDR) loop based upon subsets of data samples, or values, derived from an incoming data signal are disclosed. In particular, embodiments extend the CDR loop by slowing the clock rate with respect to the sampling clock. For instance, the slower clock rate may be implemented by dividing the frequency of the sampling clock by a number such as 128, slowing a sampling clock frequency designed to handle multiple gigabits per second (Gbps) to a frequency of less than one kilohertz (Khz). In addition to the reduced power consumption realized by operating at a lower frequency, the slower clock rate allows components of the CDR loop circuitry to operate a lower operating voltage reducing power consumption by the CDR loop even more.
摘要翻译： 公开了基于从输入数据信号导出的数据样本子集或值的确定时钟和数据恢复（CDR）循环的采样时钟的相位调整的方法和装置。 具体地，实施例通过相对于采样时钟减慢时钟速率来扩展CDR环路。 例如，较慢的时钟速率可以通过将采样时钟的频率除以诸如128的数字来实现，将被设计为处理多吉比特每秒（Gbps）的采样时钟频率减慢到小于1千赫兹的频率（Khz ）。 除了通过以较低频率操作实现的降低的功耗之外，较慢的时钟速率允许CDR环路电路的组件操作较低的工作电压，从而降低CDR环路的功耗。
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公开(公告)号：US20080284466A1
公开(公告)日：2008-11-20
申请号：US12115933
申请日：2008-05-06
IPC分类号： H03K19/003
CPC分类号： H03K19/0005 , H03K17/164 , H04L25/0278 , H04L25/028
摘要： A driver circuit is provided comprising at least two equal main units (MU) each comprising at least two sub units (SU) coupled to a data output (dout). Each sub unit (SU) is adapted to represent a respective predetermined impedance. Each main unit (MU) is adapted to that, when in a data mode, each sub unit (SU) of the respective main unit (MU) is switchable to either a first or second reference potential depending on a data signal to transmit. Each main unit (MU) is further adapted to that, when in a termination mode, the sub units (SU) of the respective main unit (MU) are switched to either the first or second reference potential such that an output of the respective main unit (MU) is neutral with respect to the driving of the data output (dout) to the first or second reference potential.
摘要翻译： 提供了驱动器电路，其包括至少两个相等的主单元（MU），每个主单元包括耦合到数据输出（dout）的至少两个子单元（SU）。 每个子单元（SU）适于表示相应的预定阻抗。 每个主单元（MU）适于当处于数据模式时，根据要发送的数据信号，各个主单元（MU）的每个子单元（SU）可切换到第一或第二参考电位。 每个主单元（MU）还适用于当处于终止模式时，相应主单元（MU）的子单元（SU）被切换到第一或第二参考电位，使得各个主单元（MU）的输出 单位（MU）相对于第一或第二参考电位的数据输出（dout）的驱动是中性的。
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公开(公告)号：US20080251870A1
公开(公告)日：2008-10-16
申请号：US11774087
申请日：2007-07-06
IPC分类号： H01L31/00
CPC分类号： H01L31/08 , H01L27/1446 , H01Q9/27
摘要： A detector for detecting electromagnetic waves, the detector having an antenna for receiving the electromagnetic waves, a semiconductor element, wherein a termination section of the semiconductor element establishes a termination resistor of the antenna, wherein the termination section is provided for heating a temperature-sensitive part of the semiconductor element, wherein the semiconductor element comprises a temperature-dependent characteristic that is dependent from the temperature of the temperature sensitive part and a measurement unit for measuring the temperature-dependent characteristic of the semiconductor element.
摘要翻译： 一种用于检测电磁波的检测器，具有用于接收电磁波的天线的检测器，半导体元件，其中半导体元件的端接部分建立天线的终端电阻器，其中终端部分用于加热温度敏感 半导体元件的一部分，其中半导体元件包括取决于温度敏感部分的温度的温度依赖特性和用于测量半导体元件的温度依赖特性的测量单元。
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公开(公告)号：US20080189063A1
公开(公告)日：2008-08-07
申请号：US11871976
申请日：2007-10-13
CPC分类号： G06G7/26
摘要： A signal generator device for generating at least one periodic signal for use in a data eye scan system. The signal generator comprises a clock input, at least one output and at least one signal generator coupled with the clock input and with the output. The signal generator is at least one token ring with a predetermined number of positions and is operable to propagate at least one token in the ring by moving the token from its current position to a following position dependent on a clock signal from the clock input. The signal generator further comprises a predetermined number of signal value units that each represent a respective predetermined signal value of a predetermined signal waveform and are operable to provide the signal value at an output of the signal generator dependent on a current position of the at least one token in the token ring.
摘要翻译： 一种用于产生用于数据眼睛扫描系统的至少一个周期信号的信号发生器装置。 信号发生器包括时钟输入，至少一个输出和至少一个与时钟输入和输出耦合的信号发生器。 信号发生器是具有预定数量位置的至少一个令牌环，并且可操作以通过根据来自时钟输入的时钟信号将令牌从其当前位置移动到后续位置来传播环中的至少一个令牌。 信号发生器还包括预定数量的信号值单元，每个信号值单元各自表示预定信号波形的相应预定信号值，并且可操作以在信号发生器的输出端提供取决于至少一个的当前位置的信号值 令牌环中的令牌。
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公开(公告)号：US07397876B2
公开(公告)日：2008-07-08
申请号：US10915790
申请日：2004-08-11
申请人： Hayden Clavie Cranford, Jr. , Gareth John Nicholls , Vernon Roberts Norman , Martin Leo Schmatz , Karl David Selander , Michael Anthony Sorna
发明人： Hayden Clavie Cranford, Jr. , Gareth John Nicholls , Vernon Roberts Norman , Martin Leo Schmatz , Karl David Selander , Michael Anthony Sorna
CPC分类号： H04L7/0337 , H03L7/091 , H03L2207/50
摘要： Methods and arrangements to determine phase adjustments for a sampling clock of a clock and data recovery (CDR) loop based upon subsets of data samples, or values, derived from an incoming data signal are disclosed. In particular, embodiments extend the CDR loop by slowing the clock rate with respect to the sampling clock. For instance, the slower clock rate may be implemented by dividing the frequency of the sampling clock by a number such as 128, slowing a sampling clock frequency designed to handle multiple gigabits per second (Gbps) to a frequency of less than one kilohertz (Khz). In addition to the reduced power consumption realized by operating at a lower frequency, the slower clock rate allows components of the CDR loop circuitry to operate a lower operating voltage reducing power consumption by the CDR loop even more.
摘要翻译： 公开了基于从输入数据信号导出的数据样本子集或值的确定时钟和数据恢复（CDR）循环的采样时钟的相位调整的方法和装置。 具体地，实施例通过相对于采样时钟减慢时钟速率来扩展CDR环路。 例如，较慢的时钟速率可以通过将采样时钟的频率除以诸如128的数字来实现，将被设计为处理多吉比特每秒（Gbps）的采样时钟频率减慢到小于1千赫兹的频率（Khz ）。 除了通过以较低频率操作实现的降低的功耗之外，较慢的时钟速率允许CDR环路电路的组件操作较低的工作电压，从而降低CDR环路的功耗。
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公开(公告)号：US08170157B2
公开(公告)日：2012-05-01
申请号：US11961545
申请日：2007-12-20
IPC分类号： H04L27/08
CPC分类号： H04L7/0008 , H03L7/07 , H03L7/08 , H03L7/0805 , H04L7/0037
摘要： The communication system having a transmitter and a receiver, wherein the transmitter and the receiver are coupled by a clock channel and a data channel, wherein the clock channel is shorter than the data channel and wherein the receiver comprises a delay circuit for extracting a jitter signal from a clock channel signal, delaying the extracted jitter signal, and generating a receiver clock signal for the receiver by the delayed jitter signal.
摘要翻译： 所述通信系统具有发射机和接收机，其中所述发射机和所述接收机通过时钟信道和数据信道耦合，其中所述时钟信道比所述数据信道短，并且其中所述接收机包括用于提取抖动信号的延迟电路 从时钟信道信号延迟提取的抖动信号，并通过延迟的抖动信号产生接收机的接收机时钟信号。
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公开(公告)号：US08130887B2
公开(公告)日：2012-03-06
申请号：US12124106
申请日：2008-05-20
申请人： Hayden Clavie Cranford, Jr. , Gareth John Nicholls , Vernon Roberts Norman , Martin Leo Schmatz , Karl David Selander , Michael Anthony Sorna
发明人： Hayden Clavie Cranford, Jr. , Gareth John Nicholls , Vernon Roberts Norman , Martin Leo Schmatz , Karl David Selander , Michael Anthony Sorna
IPC分类号： H04L7/00
CPC分类号： H04L7/0337 , H03L7/091 , H03L2207/50
摘要： Methods and arrangements to determine phase adjustments for a sampling clock of a clock and data recovery (CDR) loop based upon subsets of data samples, or values, derived from an incoming data signal are disclosed. In particular, embodiments extend the CDR loop by slowing the clock rate with respect to the sampling clock. For instance, the slower clock rate may be implemented by dividing the frequency of the sampling clock by a number such as 128, slowing a sampling clock frequency designed to handle multiple gigabits per second (Gbps) to a frequency of less than one kilohertz (Khz). In addition to the reduced power consumption realized by operating at a lower frequency, the slower clock rate allows components of the CDR loop circuitry to operate a lower operating voltage reducing power consumption by the CDR loop even more.
摘要翻译： 公开了基于从输入数据信号导出的数据样本子集或值的确定时钟和数据恢复（CDR）循环的采样时钟的相位调整的方法和装置。 具体地，实施例通过相对于采样时钟减慢时钟速率来扩展CDR环路。 例如，较慢的时钟速率可以通过将采样时钟的频率除以诸如128的数字来实现，将被设计为处理多吉比特每秒（Gbps）的采样时钟频率减慢到小于1千赫兹的频率（Khz ）。 除了通过以较低频率操作实现的降低的功耗之外，较慢的时钟速率允许CDR环路电路的组件操作较低的工作电压，从而降低CDR环路的功耗。
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公开(公告)号：US07816747B2
公开(公告)日：2010-10-19
申请号：US11774087
申请日：2007-07-06
CPC分类号： H01L31/08 , H01L27/1446 , H01Q9/27
摘要： A detector for detecting electromagnetic waves, the detector having an antenna for receiving the electromagnetic waves, a semiconductor element, wherein a termination section of the semiconductor element establishes a termination resistor of the antenna, wherein the termination section is provided for heating a temperature-sensitive part of the semiconductor element, wherein the semiconductor element comprises a temperature-dependent characteristic that is dependent from the temperature of the temperature sensitive part and a measurement unit for measuring the temperature-dependent characteristic of the semiconductor element.
摘要翻译： 一种用于检测电磁波的检测器，具有用于接收电磁波的天线的检测器，半导体元件，其中半导体元件的端接部分建立天线的终端电阻器，其中终端部分用于加热温度敏感 半导体元件的一部分，其中半导体元件包括取决于温度敏感部分的温度的温度依赖特性和用于测量半导体元件的温度依赖特性的测量单元。
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公开(公告)号：US07783439B2
公开(公告)日：2010-08-24
申请号：US11871976
申请日：2007-10-13
CPC分类号： G06G7/26
摘要： A signal generator device for generating at least one periodic signal for use in a data eye scan system. The signal generator comprises a clock input, at least one output and at least one signal generator coupled with the clock input and with the output. The signal generator is at least one token ring with a predetermined number of positions and is operable to propagate at least one token in the ring by moving the token from its current position to a following position dependent on a clock signal from the clock input. The signal generator further comprises a predetermined number of signal value units that each represent a respective predetermined signal value of a predetermined signal waveform and are operable to provide the signal value at an output of the signal generator dependent on a current position of the at least one token in the token ring.
摘要翻译： 一种用于产生用于数据眼睛扫描系统的至少一个周期信号的信号发生器装置。 信号发生器包括时钟输入，至少一个输出和至少一个与时钟输入和输出耦合的信号发生器。 信号发生器是具有预定数量位置的至少一个令牌环，并且可操作以通过根据来自时钟输入的时钟信号将令牌从其当前位置移动到后续位置来传播环中的至少一个令牌。 信号发生器还包括预定数量的信号值单元，每个信号值单元各自表示预定信号波形的相应预定信号值，并且可操作以在信号发生器的输出端提供取决于至少一个的当前位置的信号值 令牌环中的令牌。
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