Suppressing power supply noise using data scrambling in double data rate memory systems
    24.
    发明授权
    Suppressing power supply noise using data scrambling in double data rate memory systems 有权
    使用双数据速率存储器系统中的数据扰频抑制电源噪声

    公开(公告)号:US08503678B2

    公开(公告)日:2013-08-06

    申请号:US12646823

    申请日:2009-12-23

    IPC分类号: G06F21/00

    CPC分类号: G06F7/584 G06F2207/582

    摘要: Embodiments are generally directed to systems, methods, and apparatuses for suppressing power supply noise using data scrambling in double data rate memory systems. In some embodiments, an integrated circuit includes a transmit data path to transmit data to one or more memory devices. The transmit data path may include scrambling logic to generate, in parallel, N pseudo random outputs that are uncorrelated with each other. The output data and the pseudo random outputs are input to XOR logic. The transmit data path transmits the output the of XOR logic which has a substantially white frequency spectrum. Other embodiments are described and claimed.

    摘要翻译: 实施例一般涉及使用双数据速率存储器系统中的数据加扰来抑制电源噪声的系统,方法和装置。 在一些实施例中,集成电路包括用于将数据发送到一个或多个存储器设备的发送数据路径。 发送数据路径可以包括加扰逻辑,以并行地生成与彼此不相关的N个伪随机输出。 输出数据和伪随机输出被输入到异或逻辑。 发送数据路径发送具有基本为白色频谱的XOR逻辑的输出。 描述和要求保护其他实施例。

    SUPPRESSING POWER SUPPLY NOISE USING DATA SCRAMBLING IN DOUBLE DATA RATE MEMORY SYSTEMS
    25.
    发明申请
    SUPPRESSING POWER SUPPLY NOISE USING DATA SCRAMBLING IN DOUBLE DATA RATE MEMORY SYSTEMS 有权
    使用双重数据速率记忆系统中的数据扫描来抑制电源噪声

    公开(公告)号:US20100153699A1

    公开(公告)日:2010-06-17

    申请号:US12646823

    申请日:2009-12-23

    IPC分类号: H04L9/22 G06F9/24 G06F12/14

    CPC分类号: G06F7/584 G06F2207/582

    摘要: Embodiments are generally directed to systems, methods, and apparatuses for suppressing power supply noise using data scrambling in double data rate memory systems. In some embodiments, an integrated circuit includes a transmit data path to transmit data to one or more memory devices. The transmit data path may include scrambling logic to generate, in parallel, N pseudo random outputs that are uncorrelated with each other. The output data and the pseudo random outputs are input to XOR logic. The transmit data path transmits the output the of XOR logic which has a substantially white frequency spectrum. Other embodiments are described and claimed.

    摘要翻译: 实施例一般涉及使用双数据速率存储器系统中的数据加扰来抑制电源噪声的系统,方法和装置。 在一些实施例中,集成电路包括用于将数据发送到一个或多个存储器设备的发送数据路径。 发送数据路径可以包括加扰逻辑,以并行地生成与彼此不相关的N个伪随机输出。 输出数据和伪随机输出被输入到异或逻辑。 发送数据路径发送具有基本为白色频谱的XOR逻辑的输出。 描述和要求保护其他实施例。