Clocking and synchronization circuitry
    23.
    发明授权
    Clocking and synchronization circuitry 有权
    时钟和同步电路

    公开(公告)号:US06621304B2

    公开(公告)日:2003-09-16

    申请号:US10116601

    申请日:2002-04-04

    Applicant: Raj Kumar Jain

    Inventor: Raj Kumar Jain

    CPC classification number: H03L7/06 H03K2005/00247

    Abstract: A clocking and synchronization circuitry is disclosed. A plurality of windows is provided to accommodate jitters in a clock with respect to a reference clock. A plurality of delayed state cycles is generated from the clock signal for clocking internal operations within the clocked integrated circuit.

    Abstract translation: 公开了一种时钟和同步电路。 多个窗口被提供以适应相对于参考时钟的时钟的抖动。 从时钟信号产生多个延迟状态周期,用于对定时集成电路内的内部操作进行计时。

    Methods of treating viral infections using antiviral liponucleotides
    24.
    发明授权
    Methods of treating viral infections using antiviral liponucleotides 失效
    使用抗病毒脂质体处理病毒感染的方法

    公开(公告)号:US06599887B2

    公开(公告)日:2003-07-29

    申请号:US09846398

    申请日:2001-05-01

    Abstract: Compounds are disclosed for treating AIDS, herpes, and other viral infections by means of lipid derivatives of antiviral agents. The compounds consist of nucleoside analogues having antiviral activity which are linked, commonly through a phosphate group at the 5′ position of the pentose residue, to one of a selected group of lipids. The lipophilic nature of these compounds provide advantages over the use of the nucleoside analogue alone. It also makes it possible to incorporate them into the lamellar structure of liposomes, either alone or combined with similar molecules. In the form of liposomes, these antiviral agents are preferentially taken up by macrophages and monocytes, cells which have been found to harbor the target HIV virus. Additional site specificity may be incorporated into the liposomes with the addition of ligands, such as monoclonal antibodies or other peptides or proteins which bind to viral proteins. Effective nucleoside analogues are dideoxynucleosides, azidothymine (AZT), and acyclovir; lipid groups may be glycolipids, sphingolipids, phospholipids or fatty acids. The compounds persist, after intracellular hydrolysis, as phosphorylated or non-phosphorylated antiviral nucleosides. The compounds are effective in improving the efficacy of antiviral nucleoside analogues by prolonging the antiviral activity after the administration of the drug has ended, and in preventing retroviral replication in HIV infections which have become resistant to therapy with conventional forms of the antiretroviral agents.

    Abstract translation: 公开了通过抗病毒剂的脂质衍生物治疗AIDS,疱疹和其它病毒感染的化合物。 所述化合物由具有抗病毒活性的核苷类似物组成,通常通过戊糖残基的5'位置的磷酸基团连接到所选择的一组脂质之一中。 这些化合物的亲油性质优于单独使用核苷类似物的优点。 它还使得可以将它们单独或与类似分子组合在一起,将它们并入脂质体的层状结构中。 以脂质体的形式,这些抗病毒剂优先被巨噬细胞和单核细胞(已被发现携带目标HIV病毒的细胞)吸收。 可以通过加入配体如单克隆抗体或其它与病毒蛋白结合的肽或蛋白质将其中的位点特异性引入脂质体。 有效的核苷类似物是双脱氧核苷,叠氮胸腺嘧啶(AZT)和阿昔洛韦; 脂质组可以是糖脂,鞘脂,磷脂或脂肪酸。 化合物在细胞内水解后持续存在,作为磷酸化或非磷酸化的抗病毒核苷。 该化合物通过在给药药物结束后延长抗病毒活性,以及​​在用常规形式的抗逆转录病毒药物治疗已经变得耐药的HIV感染中预防逆转录病毒复制,有效地改善了抗病毒核苷类似物的功效。

    Single-port memory cell
    25.
    发明授权
    Single-port memory cell 有权
    单端口存储单元

    公开(公告)号:US06560136B1

    公开(公告)日:2003-05-06

    申请号:US09806395

    申请日:2001-06-12

    Applicant: Jain Raj Kumar

    Inventor: Jain Raj Kumar

    CPC classification number: G11C11/4023 G11C11/404

    Abstract: A single-port memory cell arrangement includes a multiplicity of single-port memory cells, each having a selection transistor and a memory transistor. The selection transistor has a control terminal connected to a word line, and a load-path connected to a data line. The memory transistor has a control terminal connected to a supply potential, and a load-path connected to the second end of the selection-transistor's load-path. The memory transistor is configured to switch, in response to a signal on the data line, between first and second potentials corresponding to two memory states. These potentials and the supply potential are selected such that first and second ends of the memory-transistor-load-path are at the same potential. The memory cell also includes a controllable switch having a first terminal connected to a supply line, and a second terminal connected to the second end of the memory-transistor-load-path. A single charging device assigned to the single-port memory cells provides providing a precharging potential. From time to time, the charging device recharges a selected memory transistor through the supply line and a selected controllable switch corresponding to that memory transistor.

    Abstract translation: 单端口存储单元布置包括多个单端口存储单元,每个具有选择晶体管和存储晶体管。 选择晶体管具有连接到字线的控制端子和连接到数据线的负载路径。 存储晶体管具有连接到电源电位的控制端子和连接到选择晶体管的负载路径的第二端的负载路径。 存储晶体管被配置为响应于数据线上的信号在对应于两个存储器状态的第一和第二电位之间切换。 选择这些电位和电源电位使得存储晶体管负载路径的第一和第二端处于相同的电位。 存储单元还包括具有连接到电源线的第一端子和连接到存储器 - 晶体管负载路径的第二端的第二端子的可控开关。 分配给单端口存储单元的单个充电装置提供预充电潜力。 有时,充电装置通过供电线路和对应于该存储晶体管的选择的可控开关对选定的存储晶体管充电。

    Multi-port memory cell with refresh port
    26.
    发明授权
    Multi-port memory cell with refresh port 有权
    具有刷新端口的多端口存储单元

    公开(公告)号:US06545905B2

    公开(公告)日:2003-04-08

    申请号:US09855164

    申请日:2001-05-14

    Applicant: Raj Kumar Jain

    Inventor: Raj Kumar Jain

    Abstract: A memory cell having a plurality of first access transistors are coupled to a first terminal of the storage transistor and a second access transistors coupled to a second terminal of the storage transistor is disclosed. The access transistors serve as access ports for the memory cell.

    Abstract translation: 具有多个第一存取晶体管的存储单元耦合到存储晶体管的第一端,并且公开了耦合到存储晶体管的第二端的第二存取晶体管。 存取晶体管用作存储单元的存取端口。

    Layout for a semiconductor memory
    27.
    发明授权
    Layout for a semiconductor memory 有权
    半导体存储器布局

    公开(公告)号:US06304478B1

    公开(公告)日:2001-10-16

    申请号:US09615987

    申请日:2000-07-14

    Applicant: Raj Kumar Jain

    Inventor: Raj Kumar Jain

    Abstract: The invention pertains to a layout for a semiconductor memory with multiple memory cells. The layout according to this invention takes into account the “design rules” specified by the manufacturing process or those required by the technology, and attempts to optimize the surface area of the layout of the semiconductor memory. The particular advantage of the invention rests in the fact that for each memory cell, effectively only one contact terminal is needed. In this manner, the required surface area for the semiconductor memory can be reduced significantly. Due to the reduction in the number of contact terminals, the leakage currents can also be reduced.

    Abstract translation: 本发明涉及具有多个存储单元的半导体存储器的布局。 根据本发明的布局考虑了由制造过程或技术要求的那些规定的“设计规则”,并尝试优化半导体存储器的布局的表面积。 本发明的特别优点在于,对于每个存储器单元,实际上仅需要一个接触端子。 以这种方式,可以显着降低半导体存储器所需的表面积。 由于接触端子数量的减少,泄漏电流也降低。

    Gas turbine generator having reserve capacity controller
    28.
    发明授权
    Gas turbine generator having reserve capacity controller 有权
    具有储备容量控制器的燃气轮机发电机

    公开(公告)号:US6164057A

    公开(公告)日:2000-12-26

    申请号:US270744

    申请日:1999-03-16

    CPC classification number: F02C9/54 F05D2270/70

    Abstract: A controller is disclosed that operates a gas turbine such that a desired reserve power capacity is maintained. The inlet guide vane angle of the compressor is applied as an indicator of the reserve capacity of the gas turbine. The actual inlet guide vane angle is continuously compared to an intended inlet guide vane angle that corresponds to a desired reserve capacity. A controller adjusts the fuel flow to the gas turbine to adjust the turbine output power and thereby maintain the actual inlet guide vane angle at the intended value corresponding to the desired reserve capacity.

    Abstract translation: 公开了一种控制器,其操作燃气涡轮机使得保持期望的备用电力容量。 作为燃气轮机的储备容量的指示器,应用压缩机的入口导叶角度。 实际的入口引导叶片角度与对应于所需储备容量的预期入口导叶角度连续地进行比较。 控制器调节到燃气轮机的燃料流量,以调节涡轮机输出功率,从而将实际的入口引导叶片角度保持在与期望的储备容量对应的预定值。

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