公开(公告)号：US20220115328A1

公开(公告)日：2022-04-14

申请号：US17066408

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stephan ESSIG

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic package and manufacturing method thereof are provided. The electronic package includes a substrate, a first encapsulant, a wettable flank and a shielding layer. The substrate includes a first surface, a second surface opposite to the first surface and a side surface connecting the first surface and the second surface. The first encapsulant is disposed on the first surface of the substrate. The wettable flank is exposed from the side surface of the substrate. The shielding layer covers a side surface of the first encapsulant, wherein on the side surface of the substrate, the shielding layer is spaced apart from the wettable flank.

公开(公告)号：US20220115310A1

公开(公告)日：2022-04-14

申请号：US17066411

申请日：2020-10-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stephan ESSIG

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: An electronic package and method for manufacturing the same are provided. The electronic package includes a substrate and a wetting layer. The substrate includes a plurality of conductive step structures each including a first portion and a second portion. The first portion has a first bottom surface, a first outer surface and a first inner surface. The second portion has a second bottom surface, a second outer surface and a second inner surface, wherein the second portion partially exposes the first bottom surface. The wetting layer at least covers the second bottom surface, the second outer surface and the second inner surface of the second portion of each of the conductive step structures.

公开(公告)号：US20220037290A1

公开(公告)日：2022-02-03

申请号：US17499646

申请日：2021-10-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

公开(公告)号：US20210296259A1

公开(公告)日：2021-09-23

申请号：US16824425

申请日：2020-03-19

Applicant: Advanced Semiconductor Engineering, Inc. ,  Phoenix Pioneer Technology Co., Ltd.

Inventor： You-Lung YEN ,  Pao-Hung CHOU ,  Chun-Hsien YU

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/14 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

Abstract: A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.

公开(公告)号：US20210296219A1

公开(公告)日：2021-09-23

申请号：US16824423

申请日：2020-03-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

Abstract: A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, an optically-cured dielectric layer, a plurality of block layers and a sacrificial layer. The circuit layer includes a plurality of conductive pads. The optically-cured dielectric layer has an upper surface and a lower surface opposite to the upper surface. The optically-cured dielectric layer covers the circuit layer, and first surfaces of the conductive pads are at least partially exposed from the upper surface of the optically-cured dielectric layer. The block layers are respectively disposed on the first surfaces of the conductive pads exposed by the optically-cured dielectric layer. The sacrificial layer is disposed on the optically-cured dielectric layer and covering the block layers.

公开(公告)号：US20210183787A1

公开(公告)日：2021-06-17

申请号：US16717948

申请日：2019-12-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package includes an electronic component, an infrared blocking layer, an upper protection layer and a side protection layer. The infrared blocking layer includes a first portion disposed over the electronic component. The infrared blocking layer includes a second portion surrounding the electronic component. The first portion is integral with the second portion. The upper protection layer is disposed on the first portion of the infrared blocking layer. The side protection layer is disposed on the second portion of the infrared blocking layer. The upper protection layer and the side protection layer are formed of different materials.

公开(公告)号：US20210166993A1

公开(公告)日：2021-06-03

申请号：US16700761

申请日：2019-12-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L23/48 ,  H01L23/482 ,  H01L23/31 ,  H01L21/56 ,  H01L21/762 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a first semiconductor die, a conductive via, a first contact pad and a second contact pad. The substrate includes a first surface, and a second surface opposite to the first surface, the substrate defines a cavity through the substrate. The first semiconductor die is disposed in the cavity, wherein the first semiconductor die includes an active surface adjacent to the first surface, and an inactive surface. The conductive via penetrates through the substrate. The first contact pad is exposed from the active surface of the first semiconductor die and adjacent to the first surface of the substrate. The second contact pad is disposed on the first surface of the substrate, wherein the second contact pad is connected to a first end of the conductive via.

公开(公告)号：US20200135604A1

公开(公告)日：2020-04-30

申请号：US16173974

申请日：2018-10-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package structure includes a patterned conductive layer with a front surface, a back surface, and a side surface connecting the front surface and the back surface. The semiconductor package structure further includes a first semiconductor chip on the front surface and electrically connected to the patterned conductive layer, a first encapsulant covering at least the back surface of the patterned conductive layer, and a second encapsulant covering at least the front surface of the patterned conductive layer, the side surface being covered by one of the first encapsulant and the second encapsulant.

公开(公告)号：US20240355793A1

公开(公告)日：2024-10-24

申请号：US18137392

申请日：2023-04-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kay Stefan ESSIG ,  You-Lung YEN ,  Bernd Karl APPELT ,  Jean Marc YANNOU

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L2225/1058

Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure is provided. The semiconductor package structure includes a carrier and a component. The carrier includes a first part and a second part separated from the first part. The component is disposed under the first part and electrically connected to the second part. The first part is configured to be electrically connected to a device disposed over the first part.

公开(公告)号：US20230097299A1

公开(公告)日：2023-03-30

申请号：US17477238

申请日：2021-09-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung YEN ,  Bernd Karl APPELT

IPC: H01L23/31 ,  H01L23/29

Abstract: An electronic package includes a carrier, a protection layer and an electronic component. The carrier includes a dielectric layer and a pad in contact with the dielectric layer. The protection layer at least partially covers the pad. The electronic component is located over the protection layer and electrically connected to the pad. At least one portion of the protection layer under the electronic component is substantially conformal with a profile of the pad or with a profile of the dielectric layer.