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    Chip-to-chip optical data communication system
    22.
    发明授权
    Chip-to-chip optical data communication system 有权

    公开(公告)号：US11994724B2

    公开(公告)日：2024-05-28

    申请号：US17671525

    申请日：2022-02-14

    Applicant: Ayar Labs, Inc.

    Inventor： Alexandra Wright ,  Mark Wade ,  Chen Sun ,  Vladimir Stojanovic ,  Rajeev Ram ,  Milos Popovic ,  Roy Edward Meade ,  Derek Van Orden

    IPC: G02B6/293 ,  G02B6/42 ,  G02B6/43

    CPC classification number: G02B6/4202 ,  G02B6/2934 ,  G02B6/4216 ,  G02B6/4219 ,  G02B6/4287

    Abstract: An optical input/output chiplet is disposed on a first package substrate. The optical input/output chiplet includes one or more supply optical ports for receiving continuous wave light. The optical input/output chiplet includes one or more transmit optical ports through which modulated light is transmitted. The optical input/output chiplet includes one or more receive optical ports through which modulated light is received by the optical input/output chiplet. An optical power supply module is disposed on a second package substrate. The second package substrate is separate from the first package substrate. The optical power supply module includes one or more output optical ports through which continuous wave laser light is transmitted. A set of optical fibers optically connect the one or more output optical ports of the optical power supply module to the one or more supply optical ports of the optical input/output chiplet.

    Thermal management system for multi-chip-module and associated methods
    24.
    发明授权
    Thermal management system for multi-chip-module and associated methods 有权

    公开(公告)号：US11493708B2

    公开(公告)日：2022-11-08

    申请号：US17021805

    申请日：2020-09-15

    Applicant: Ayar Labs, Inc.

    Inventor： Roy Edward Meade ,  Vladimir Stojanovic

    IPC: H01L23/36 ,  G02B6/42 ,  H01L25/00 ,  H01L25/16

    Abstract: A plurality of lid structures include at least one lid structure configured to overlie one or more heat sources within a multi-chip-module and at least one lid structure configured to overlie one or more temperature sensitive components within the multi-chip-module. The plurality of lid structures are configured and positioned such that each lid structure is separated from each adjacent lid structure by a corresponding thermal break. A heat spreader assembly is positioned in thermally conductive interface with the plurality of lid structures. The heat spreader assembly is configured to cover an aggregation of the plurality of lid structures. The heat spreader assembly includes a plurality of separately defined heat transfer members respectively configured and positioned to overlie the plurality of lid structures. The heat spreader assembly is configured to limit heat transfer between different heat transfer members within the heat spreader assembly.

    Chip-to-Chip Optical Data Communication System
    25.
    发明申请
    Chip-to-Chip Optical Data Communication System 有权

    公开(公告)号：US20220171142A1

    公开(公告)日：2022-06-02

    申请号：US17671525

    申请日：2022-02-14

    Applicant: Ayar Labs, Inc.

    Inventor： Alexandra Wright ,  Mark Wade ,  Chen Sun ,  Vladimir Stojanovic ,  Rajeev Ram ,  Milos Popovic ,  Roy Edward Meade ,  Derek Van Orden

    IPC: G02B6/42 ,  G02B6/293

    Abstract: An optical input/output chiplet is disposed on a first package substrate. The optical input/output chiplet includes one or more supply optical ports for receiving continuous wave light. The optical input/output chiplet includes one or more transmit optical ports through which modulated light is transmitted. The optical input/output chiplet includes one or more receive optical ports through which modulated light is received by the optical input/output chiplet. An optical power supply module is disposed on a second package substrate. The second package substrate is separate from the first package substrate. The optical power supply module includes one or more output optical ports through which continuous wave laser light is transmitted. A set of optical fibers optically connect the one or more output optical ports of the optical power supply module to the one or more supply optical ports of the optical input/output chiplet.

    Low-Power Optical Input/Output Chiplet for Ethernet Switches (TeraPHYe)
    26.
    发明申请
    Low-Power Optical Input/Output Chiplet for Ethernet Switches (TeraPHYe) 有权

    公开(公告)号：US20220166533A1

    公开(公告)日：2022-05-26

    申请号：US17527483

    申请日：2021-11-16

    Applicant: Ayar Labs, Inc.

    Inventor： Vladimir Stojanovic ,  Hugo Saleh ,  Roy Edward Meade

    IPC: H04J14/02 ,  H04L12/931 ,  H04Q11/00

    Abstract: A network switch system-in-package includes a carrier substrate with a network switch chip and a plurality of photonic input/output modules disposed on the carrier substrate. Each of the plurality of photonic input/output modules includes a module substrate and a plurality of photonic chip pods disposed on the module substrate. Each photonic chip pod includes a pod substrate with a photonic input/output chiplet and a gearbox chiplet attached to the pod substrate. The photonic input/output chiplet includes a parallel electrical interface, a photonic interface, and a plurality of optical macros implemented between the photonic interface and the parallel electrical interface. The gearbox chiplet electrically connects with the parallel electrical interface of the photonic input/output chiplet and a serial electrical interface of the network switch chip. The gearbox chiplet converts between the parallel electrical interface of the photonic input/output chiplet and the serial electrical interface of the network switch chip.

    Pooled DRAM system enabled by monolithic in-package optical I/O
    28.
    发明授权
    Pooled DRAM system enabled by monolithic in-package optical I/O 有权

    公开(公告)号：US11233580B2

    公开(公告)日：2022-01-25

    申请号：US17175678

    申请日：2021-02-14

    Applicant: Ayar Labs, Inc.

    Inventor： Roy Edward Meade ,  Vladimir Stojanovic ,  Chen Sun ,  Mark Wade ,  Hugo Saleh ,  Charles Wuischpard

    IPC: G11C5/04 ,  G11C5/06 ,  G11C11/42 ,  H04B10/80 ,  H04B10/516

    Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.

    TeraPHY Chiplet Optical Input/Output System
    29.
    发明申请
    TeraPHY Chiplet Optical Input/Output System 有权

    公开(公告)号：US20210286129A1

    公开(公告)日：2021-09-16

    申请号：US17184537

    申请日：2021-02-24

    Applicant: Ayar Labs, Inc.

    Inventor： John Fini ,  Vladimir Stojanovic ,  Chen Sun ,  Derek van Orden ,  Mark Taylor Wade

    IPC: G02B6/12 ,  G02B6/293 ,  H04B10/25 ,  G02B6/125 ,  G02B6/43

    Abstract: An electro-optical chip includes an optical input port, an optical output port, and an optical waveguide having a first end optically connected to the optical input port and a second end optically connected to the optical output port. The optical waveguide includes one or more segments. Different segments of the optical waveguide extends in either a horizontal direction, a vertical direction, a direction between horizontal and vertical, or a curved direction. The electro-optical chip also includes a plurality of optical microring resonators is positioned along at least one segment of the optical waveguide. Each microring resonator of the plurality of optical microring resonators is optically coupled to a different location along the optical waveguide. The electro-optical chip also includes electronic circuitry for controlling a resonant wavelength of each microring resonator of the plurality of optical microring resonators.

    Electro-Optical Interface Module and Associated Methods
    30.
    发明申请
    Electro-Optical Interface Module and Associated Methods 审中-公开

    公开(公告)号：US20200021384A1

    公开(公告)日：2020-01-16

    申请号：US16510824

    申请日：2019-07-12

    Applicant: Ayar Labs, Inc.

    Inventor： Vladimir Stojanovic ,  Alexandra Wright ,  Chen Sun ,  Mark Wade ,  Roy Edward Meade

    IPC: H04J14/02 ,  H04Q11/00 ,  H04B10/50

    Abstract: A TORminator module is disposed with a switch linecard of a rack. The TORminator module receives downlink electrical data signals from a rack switch. The TORminator module translates the downlink electrical data signals into downlink optical data signals. The TORminator module transmits multiple subsets of the downlink optical data signals through optical fibers to respective SmartDistributor modules disposed in respective racks. Each SmartDistributor module receives multiple downlink optical data signals through a single optical fiber from the TORminator module. The SmartDistributor module demultiplexes the multiple downlink optical data signals and distributes them to respective servers. The SmartDistributor module receives multiple uplink optical data signals from multiple servers and multiplexes them onto a single optical fiber for transmission to the TORminator module. The TORminator module coverts the multiple uplink optical data signals to multiple uplink electrical data signals, and transmits the multiple uplink electrical data signals to the rack switch.

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