DISPLAY SUBSTRATE AND DISPLAY APPARATUS
    21.
    发明公开

    公开(公告)号:US20230165076A1

    公开(公告)日:2023-05-25

    申请号:US17630589

    申请日:2021-02-08

    CPC classification number: H10K59/131 G09G3/3233 H10K59/126

    Abstract: A display substrate has sub-pixels. Each column of sub-pixels includes first and second sub-pixels alternately arranged. The display substrate includes a base, a second source-drain metal layer including first and second connection portions, and a first source-drain metal layer including first and second data lines alternately arranged. A pixel driving circuit of each first sub-pixel is connected to a second end of a first connection portion, and a first end there is connected to a corresponding first data line. A pixel driving circuit of each second sub-pixel is connected to a second end of a second connection portion, and a first end thereof is connected to a corresponding second data line. In a same column of sub-pixels, an extension direction of a first line connecting a second end of a first connection portion and a second end of a second connection portion is substantially parallel to a second direction.

    SHIFT REGISTER UNIT, DRIVING METHOD, GATE DRIVING CIRCUIT AND DISPLAY DEVICE

    公开(公告)号:US20210090484A1

    公开(公告)日:2021-03-25

    申请号:US16964465

    申请日:2019-09-25

    Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes a first gate driving output circuit and a second gate driving output circuit. The first gate driving output circuit is used to output a first gate driving signal through the first gate driving signal output terminal; the second gate driving output circuit is used to generate a second gate driving signal outputted simultaneously with the first gate driving signal based on the first gate driving signal, a first clock signal and a second clock signal. In the present disclosure, the second gate driving output circuit is added, the first gate driving signal, the first clock signal, and the second clock signal are used to generate an inverted second gate driving signal, so that positive and negative switching control signals are generated by one stage of shift register unit.

    DISPLAY SUBSTRATE AND PREPARATION METHOD THEREOF, AND DISPLAY APPARATUS

    公开(公告)号:US20250140193A1

    公开(公告)日:2025-05-01

    申请号:US19010218

    申请日:2025-01-06

    Abstract: Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.

    DISPLAY PANEL, METHOD FOR DRIVING THE SAME, AND DISPLAY DEVICE

    公开(公告)号:US20240290244A1

    公开(公告)日:2024-08-29

    申请号:US18655073

    申请日:2024-05-03

    CPC classification number: G09G3/2092 G09G2310/0297 G09G2310/061

    Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

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