ARRAY SUBSTRATE AND DISPLAY DEVICE
    21.
    发明公开

    公开(公告)号:US20240177662A1

    公开(公告)日:2024-05-30

    申请号:US17789918

    申请日:2021-06-29

    Abstract: An array substrate and a display device are provided. The array substrate includes a plurality of pixel driving circuits, each of which includes a driving transistor, a first light emitting control transistor, a compensation transistor, a first initialization transistor and a second initialization transistor; a first electrode of the first initialization transistor and a first electrode of the first light emitting control transistor are connected to a first node; a first electrode of the second initialization transistor and a first electrode of the compensation transistor are connected to a second node, a second electrode of the first initialization transistor is configured to receive the first initialization signal, and a cathode of the light emitting element is configured to receive a first driving signal, and a difference between a potential of the first initialization signal and a potential of the first driving signal is less than 1.5V.

    SHIFT REGISTER CIRCUIT AND DRIVING METHOD THEREOF, GATE DRIVING CIRCUIT, AND DISPLAY DEVICE

    公开(公告)号:US20240071312A1

    公开(公告)日:2024-02-29

    申请号:US17765045

    申请日:2021-03-23

    CPC classification number: G09G3/3266 G09G2310/0286 G11C19/287

    Abstract: A shift register circuit includes a first control sub-circuit and a first output sub-circuit. The first control sub-circuit is configured to: adjust a voltage of a first node to a turn-on voltage due to an influence of a first direct current voltage signal from a first clock signal terminal, an initial voltage signal from an initial signal terminal and a second direct current voltage signal from a second clock signal terminal; and maintain the voltage of the first node at the turn-on voltage due to an influence of a first clock signal from the first clock signal terminal and a second clock signal from the second clock signal terminal. The first output sub-circuit is configured to be turned on under a control of the turn-on voltage of the first node to transmit a first voltage signal from a first voltage terminal to a signal output terminal.

    PIXEL COMPENSATION CIRCUIT, DRIVING METHOD THEREOF AND DISPLAY DEVICE

    公开(公告)号:US20230178015A1

    公开(公告)日:2023-06-08

    申请号:US17428906

    申请日:2021-02-24

    Inventor: Li WANG

    Abstract: The present disclosure provides a pixel compensation circuit and a driving method thereof. The pixel compensation circuit includes a resetting unit, a write-in unit, a light-emitting unit, a storage capacitor and a driving transistor. The resetting unit is configured to receive a resetting signal and release electric energy on the storage capacitor and an electroluminescence element. The write-in unit is configured to receive a gate driving signal and write display data into a holding node coupled to the storage capacitor. The light-emitting unit is configured to receive a light-emitting signal and turn on the driving transistor to enable the electroluminescence element to emit light. A compensation unit is added between the holding node and a high potential end and configured to generate a reverse current for compensating a leakage current of the resetting unit.

    DISPLAY SUBSTRATE AND DISPLAY APPARATUS
    26.
    发明公开

    公开(公告)号:US20230165076A1

    公开(公告)日:2023-05-25

    申请号:US17630589

    申请日:2021-02-08

    CPC classification number: H10K59/131 G09G3/3233 H10K59/126

    Abstract: A display substrate has sub-pixels. Each column of sub-pixels includes first and second sub-pixels alternately arranged. The display substrate includes a base, a second source-drain metal layer including first and second connection portions, and a first source-drain metal layer including first and second data lines alternately arranged. A pixel driving circuit of each first sub-pixel is connected to a second end of a first connection portion, and a first end there is connected to a corresponding first data line. A pixel driving circuit of each second sub-pixel is connected to a second end of a second connection portion, and a first end thereof is connected to a corresponding second data line. In a same column of sub-pixels, an extension direction of a first line connecting a second end of a first connection portion and a second end of a second connection portion is substantially parallel to a second direction.

    PIXEL DRIVING CIRCUIT AND PIXEL DRIVING METHOD THEREFOR, DISPLAY PANEL, AND DISPLAY APPARATUS

    公开(公告)号:US20230042603A1

    公开(公告)日:2023-02-09

    申请号:US17791965

    申请日:2021-05-17

    Abstract: A pixel driving circuit includes a reset sub-circuit, a compensation sub-circuit, a light-emitting control sub-circuit and a driving sub-circuit. The reset sub-circuit is configured to transmit an initialization signal received from an initialization signal terminal to the light-emitting control sub-circuit. The fight-emitting control sub-circuit is configured to transmit the initialization signal to the first node. The compensation sub-circuit is configured to transmit the initialization signal from the first node to a second node so as to reset a voltage of the second node. The driving sub-circuit is configured to open a conductive path from a first voltage signal terminal to the initialization signal terminal during a process of resetting the voltage of the second node.

    DRIVING BACKPLANE AND DISPLAY PANEL

    公开(公告)号:US20220328007A1

    公开(公告)日:2022-10-13

    申请号:US17851253

    申请日:2022-06-28

    Inventor: Tian DONG Li WANG

    Abstract: A driving backplane includes: a base, and pixel driving circuits, data lines and first power supply voltage lines that are disposed on the base. The pixel driving circuit is electrically connected to a data line and a first power supply voltage line. The pixel driving circuit includes a driving transistor, a first switching transistor, and a first conductive pattern located on a side, away from the base, of a gate of the driving transistor and a gate of the first switching transistor. The first conductive pattern is electrically connected to the gate of the driving transistor through a first via, and to a second electrode of the first switching transistor through a second via. An orthogonal projection of the first conductive pattern on the base is located within an orthogonal projection of the first power supply voltage line on the base.

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