Apparatus, system, and method for measuring magnetoresistive head resistance
    21.
    发明授权
    Apparatus, system, and method for measuring magnetoresistive head resistance 失效
    用于测量磁阻头电阻的装置,系统和方法

    公开(公告)号:US07130143B1

    公开(公告)日:2006-10-31

    申请号:US11116782

    申请日:2005-04-28

    IPC分类号: G11B5/03

    摘要: An apparatus, system, and method are disclosed for measuring magnetoresistive head assembly resistance. A measurement module measures a reference voltage across a reference resistance while applying a reference current to the reference resistance. In addition, the measurement module measures a test voltage across a first biasing resistor, a MR head assembly, and a second biasing resistor connected in series while applying the reference current to the first biasing resistor, the MR head assembly, and the second biasing resistor. A computation module calculates the MR head assembly resistance from the reference voltage, the test voltage, the reference resistance, and the resistances of the first and second biasing resistors.

    摘要翻译: 公开了用于测量磁阻头组件电阻的装置,系统和方法。 测量模块在参考电阻施加参考电流时测量参考电阻两端的参考电压。 此外,测量模块测量跨第一偏置电阻器,MR头组件和串联连接的第二偏置电阻器的测试电压,同时将参考电流施加到第一偏置电阻器,MR头组件和第二偏置电阻器 。 计算模块根据参考电压,测试电压,参考电阻和第一和第二偏置电阻器的电阻计算MR磁头组装电阻。

    Dual gain control for magnetic data storage system
    22.
    发明授权
    Dual gain control for magnetic data storage system 有权
    磁数据存储系统的双增益控制

    公开(公告)号:US08254048B2

    公开(公告)日:2012-08-28

    申请号:US13101969

    申请日:2011-05-05

    IPC分类号: G11B5/09

    摘要: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signal.

    摘要翻译: 根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一增益控制电路,用于控制模拟信号的增益; 用于将模拟信号转换成数字信号的模数转换器; 第一增益误差产生电路,用于基于所述模数转换器的输出产生第一增益误差信号,所述第一增益误差信号或其导数由所述第一增益控制电路接收; 以及第二增益误差产生电路,用于根据由第一增益控制电路接收的数字信号,第二增益误差信号或其导数产生第二增益误差信号,其中第一增益控制电路使用增益中的至少一个 误差信号来控制模拟信号的增益。

    DUAL GAIN CONTROL FOR MAGNETIC DATA STORAGE SYSTEM
    23.
    发明申请
    DUAL GAIN CONTROL FOR MAGNETIC DATA STORAGE SYSTEM 有权
    磁数据存储系统的双增益控制

    公开(公告)号:US20110228424A1

    公开(公告)日:2011-09-22

    申请号:US13101969

    申请日:2011-05-05

    IPC分类号: G11B5/78 H03L7/06

    摘要: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signal.

    摘要翻译: 根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一增益控制电路,用于控制模拟信号的增益; 用于将模拟信号转换成数字信号的模数转换器; 第一增益误差产生电路,用于基于所述模数转换器的输出产生第一增益误差信号,所述第一增益误差信号或其导数由所述第一增益控制电路接收; 以及第二增益误差产生电路,用于根据由第一增益控制电路接收的数字信号,第二增益误差信号或其导数产生第二增益误差信号,其中第一增益控制电路使用增益中的至少一个 误差信号来控制模拟信号的增益。

    Dual gain control for magnetic data storage system
    25.
    发明授权
    Dual gain control for magnetic data storage system 失效
    磁数据存储系统的双增益控制

    公开(公告)号:US07982992B2

    公开(公告)日:2011-07-19

    申请号:US12351464

    申请日:2009-01-09

    IPC分类号: G11B5/09

    摘要: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signals.

    摘要翻译: 根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一增益控制电路,用于控制模拟信号的增益; 用于将模拟信号转换成数字信号的模数转换器; 第一增益误差产生电路,用于基于所述模数转换器的输出产生第一增益误差信号,所述第一增益误差信号或其导数由所述第一增益控制电路接收; 以及第二增益误差产生电路,用于根据由第一增益控制电路接收的数字信号,第二增益误差信号或其导数产生第二增益误差信号,其中第一增益控制电路使用增益中的至少一个 误差信号来控制模拟信号的增益。

    DUAL GAIN CONTROL FOR MAGNETIC DATA STORAGE SYSTEM
    26.
    发明申请
    DUAL GAIN CONTROL FOR MAGNETIC DATA STORAGE SYSTEM 失效
    磁数据存储系统的双增益控制

    公开(公告)号:US20100177423A1

    公开(公告)日:2010-07-15

    申请号:US12351464

    申请日:2009-01-09

    IPC分类号: G11B5/09

    摘要: A system according to one embodiment includes an analog input for receiving an analog signal; a variable gain amplifier coupled to the analog input; a first gain control circuit coupled to the variable gain amplifier for controlling the gain of the analog signal; an analog to digital converter for converting the analog signal to a digital signal; a first gain error generation circuit for generating a first gain error signal based on an output of the analog to digital converter, the first gain error signal or derivative thereof being received by the first gain control circuit; and a second gain error generation circuit for generating a second gain error signal based on the digital signal, the second gain error signal or derivative thereof being received by the first gain control circuit, wherein the first gain control circuit uses at least one of the gain error signals to control the gain of the analog signals.

    摘要翻译: 根据一个实施例的系统包括用于接收模拟信号的模拟输入; 耦合到模拟输入的可变增益放大器; 耦合到可变增益放大器的第一增益控制电路,用于控制模拟信号的增益; 用于将模拟信号转换成数字信号的模数转换器; 第一增益误差产生电路,用于基于所述模数转换器的输出产生第一增益误差信号,所述第一增益误差信号或其导数由所述第一增益控制电路接收; 以及第二增益误差产生电路,用于根据由第一增益控制电路接收的数字信号,第二增益误差信号或其导数产生第二增益误差信号,其中第一增益控制电路使用增益中的至少一个 误差信号来控制模拟信号的增益。

    Open head detection circuit and method in a voltage or current mode driver
    28.
    发明授权
    Open head detection circuit and method in a voltage or current mode driver 失效
    打开磁头检测电路和方法在电压或电流模式驱动

    公开(公告)号:US06952316B2

    公开(公告)日:2005-10-04

    申请号:US10290979

    申请日:2002-11-08

    摘要: An open write head detection circuit is provided comprising a write head driver circuit, a programmable reference voltage source, a comparator and a pulse width filter. The write head driver circuit generates an voltage sense signal. The comparator compares the voltage sense signal with a reference voltage from the programmable reference voltage source and generates a comparator output signal indicative of whether the voltage sense signal is greater than or less than the reference voltage. The comparator output signal is input to the pulse width filter which generates a latched open head signal in response the voltage sense signal being less than the reference level for a predetermined time measured as a programmable number of write clock cycles.

    摘要翻译: 提供了一种开放式写入头检测电路,包括写入头驱动电路,可编程参考电压源,比较器和脉冲宽度滤波器。 写头驱动电路产生电压检测信号。 比较器将电压检测信号与来自可编程参考电压源的参考电压进行比较,并产生指示电压检测信号是否大于或小于参考电压的比较器输出信号。 比较器输出信号被输入到脉冲宽度滤波器,该脉冲宽度滤波器响应于电压检测信号小于参考电平而产生锁存开路信号,该预定时间以可编程数量的写时钟周期测量。

    Innovative bypass circuit for circuit testing and modification
    29.
    发明授权
    Innovative bypass circuit for circuit testing and modification 失效
    用于电路测试和修改的创新旁路电路

    公开(公告)号:US06928581B1

    公开(公告)日:2005-08-09

    申请号:US09395854

    申请日:1999-09-14

    摘要: An integrated circuit module is designed with bypass switches in critical places to route signals around specific circuit blocks, e.g. an automatic gain control (AGC) system and an anti-aliasing filter. If there had been significant problems with either block, it can be bypassed and tests of the remaining circuits are possible. This allows all circuits in the module to be tested in the initial pass, reducing the risk of needing a third pass after the known problems were fixed in the second pass. Additionally, the bypass circuits are useful at module production test and for diagnostics in the final product.

    摘要翻译: 集成电路模块设计有关键位置的旁路开关,用于在特定电路块周围路由信号,例如。 自动增益控制(AGC)系统和抗混叠滤波器。 如果任何一个块都存在重大问题,可以绕过它,并且剩余电路的测试是可能的。 这允许在初始通过中对模块中的所有电路进行测试,在已知问题在第二次通过中被修复之后,减少需要第三遍的风险。 此外,旁路电路可用于模块生产测试和最终产品中的诊断。

    Write head current damping with dynamic coupling
    30.
    发明授权
    Write head current damping with dynamic coupling 失效
    用动态耦合写头电流阻尼

    公开(公告)号:US06680809B1

    公开(公告)日:2004-01-20

    申请号:US09689376

    申请日:2000-10-12

    IPC分类号: G11B502

    摘要: A write head circuit is provided having improved transient and steady state response. The circuit includes a dynamically coupled damping circuit that is coupled to the write head during transient periods of a write signal to substantially reduce or eliminate overshoot generated by a write head cable. During steady state or data writing periods, the damping circuit is decoupled from the write head to prevent unnecessary loading of the write head. In preferred embodiments, the damping circuit includes a resistor in series with a capacitor, and the damping circuit is coupled in parallel to the write head. The resistor substantially reduces the overshoot of a write signal supplied to the write head, while the capacitor decouples the resistor from the write head during steady state or data write periods.

    摘要翻译: 提供具有改进的瞬态和稳态响应的写头电路。 该电路包括动态耦合的阻尼电路,其在写入信号的瞬态期间耦合到写入头,以显着地减少或消除由写头电缆产生的过冲。 在稳态或数据写入期间,阻尼电路与写头分离,以防止不必要的写入头负载。 在优选实施例中,阻尼电路包括与电容器串联的电阻器,并且阻尼电路并联耦合到写入头。 该电阻器基本上减小了提供给写入头的写入信号的过冲,同时电容器在稳定状态或数据写入周期期间使电阻器与写入头分离。