公开(公告)号：US20130076417A1

公开(公告)日：2013-03-28

申请号：US13247636

申请日：2011-09-28

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03L7/00

CPC classification number: H03K7/08 ,  H02M3/1584 ,  H03K19/00315 ,  H04L25/4902

Abstract: Multi-phase, frequency coherent pulse width modulation (PWM) signals are generated that maintain PWM data-set coherency regardless of user or system events. PWM data-set coherency is accomplished by adding data buffers to hold and transfer new PWM data during a data-set update from a processor. After the data-set transfer to the data buffers is complete and when the next PWM cycle is about to start, the data-set stored in the data buffers is transferred to the active PWM registers in time for the start of the next PWM cycle.

Abstract translation: 生成多相，频率相干脉宽调制（PWM）信号，无论用户或系统事件如何，均可维持PWM数据集的一致性。 PWM数据集的一致性是通过在处理器的数据集更新期间添加数据缓冲器来保存和传输新的PWM数据来实现的。 在数据传输到数据缓冲区完成之后，当下一个PWM周期即将开始时，数据缓冲器中存储的数据组将及时传送到有源PWM寄存器，以便下一个PWM周期的开始。

公开(公告)号：US08362819B1

公开(公告)日：2013-01-29

申请号：US13248668

申请日：2011-09-29

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03K3/017

CPC classification number: H03K7/08 ,  G06F1/04

Abstract: A “quasi-master-time-base” circuit is used to periodically resynchronize the individual PWM generators to a know reference signal. This quasi-master-time-base will be at the lowest frequency relative to all of the PWM output frequencies, wherein all of the PWM output frequencies are at the same frequency or at an integer multiple frequency(ies) of the quasi-master frequency. This “quasi-master-time-base” circuit allows for minor timing errors due to user PWM configuration errors and/or update errors, and still yields stable PWM signal outputs that remain synchronized to each other.

Abstract translation: 准主时基电路用于周期性地将各个PWM发生器重新同步到已知参考信号。 该准主时基相对于所有PWM输出频率将处于最低频率，其中所有PWM输出频率处于准主频率的相同频率或整数倍频率 。 这种准主时基电路允许由于用户PWM配置错误和/或更新错误导致的次要定时误差，并且仍然产生保持彼此同步的稳定的PWM信号输出。

公开(公告)号：US20110222322A1

公开(公告)日：2011-09-15

申请号：US12722602

申请日：2010-03-12

Applicant: Bryan Kris ,  Sagar Khare ,  Mohammad Kamil

Inventor： Bryan Kris ,  Sagar Khare ,  Mohammad Kamil

IPC: H02M1/36

CPC classification number: H02M1/36 ,  H02M3/33515

Abstract: A digital device generates a fixed duty cycle signal with an internal oscillator after a Power-On-Reset (POR). This fixed duty cycle signal is output on a signal pin that normally is used for a PWM control signal. The fixed duty cycle signal is used to stimulate the voltage generation circuits so as to power up the digital device for initialization thereof. Once the digital device has powered-up and initialized, the digital device switches over to normal operation for control of the power system.

Abstract translation: 数字设备在上电复位（POR）之后，通过内部振荡器产生固定的占空比信号。 该固定占空比信号在通常用于PWM控制信号的信号引脚上输出。 固定占空比信号用于激励电压产生电路，以便为数字设备供电以进行初始化。 一旦数字设备通电并初始化，数字设备将切换到正常操作，以控制电源系统。

公开(公告)号：US07804379B2

公开(公告)日：2010-09-28

申请号：US12116468

申请日：2008-05-07

Applicant: Bryan Kris ,  Stephen Bowling

Inventor： Bryan Kris ,  Stephen Bowling

IPC: H02M1/12 ,  H02M3/335 ,  H03K7/08

CPC classification number: H03K7/08 ,  H02M1/38 ,  H03K5/1515

Abstract: Dead time compensated complementary pulse width modulation (PWM) signals are derived from a PWM generator by first applying time period compensation to the PWM generator signal based upon the direction of current flow in an inductive load being controlled by the PWM generator. Dead time is then applied to the compensated PWM generator signal for producing complementary dead time compensated PWM signals for controlling power switching circuits driving the inductive load.

Abstract translation: 基于在由PWM发生器控制的感性负载中的电流流动的方向，首先对PWM发生器信号施加时间周期补偿，从PWM发生器得到死区补偿互补脉宽调制（PWM）信号。 然后将死时间施加到补偿的PWM发生器信号，以产生用于控制驱动感性负载的功率开关电路的互补死区补偿PWM信号。

公开(公告)号：US07791386B2

公开(公告)日：2010-09-07

申请号：US12351371

申请日：2009-01-09

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03L7/00

CPC classification number: H03K7/08

Abstract: Waveform errors between multiphase PWM signals caused by external synchronization signals is solved by providing a capture register in a master time base circuit. The capture register is triggered by the external sync signal so as to “capture” the value of the master time base counter at the occurrence of the rising edge of the external sync signal. This captured counter value is then provided to the local time bases of each of the phase PMW signal generators as the effective PWM period instead of locally stored PWM period values of each PWM signal generator. The captured time base value provided to the individual PWM generator time bases insures that the individual PWM generators remain properly synchronized to the master time base throughout the PWM cycles of all of the phases.

Abstract translation: 通过在主时基电路中提供捕获寄存器来解决由外部同步信号引起的多相PWM信号之间的波形误差。 捕获寄存器由外部同步信号触发，以便在外部同步信号的上升沿出现时捕获主时基计数器的值。 然后将该捕获的计数器值提供给每个相位PMW信号发生器的本地时基作为有效PWM周期，而不是每个PWM信号发生器的本地存储的PWM周期值。 提供给各个PWM发生器时基的捕获的时基值确保各个PWM发生器在所有相的整个PWM周期内保持与主时基的正确同步。

公开(公告)号：US20100134168A1

公开(公告)日：2010-06-03

申请号：US12697919

申请日：2010-02-01

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03K3/017

CPC classification number: H03K7/08 ,  H03K3/017 ,  H03M1/68 ,  H03M1/822

Abstract: Using a combination of frequency dithering of a PWM counter and a variable time delay circuit yields improved PWM frequency resolution with realizable circuit components and clock operating frequencies. A controllable time delay circuit lengthens a PWM signal during the first PWM cycle. During the second PWM cycle, the PWM period is increased beyond the desired amount, but the delay is reduced during this second PWM cycle to achieve the correct (desired) PWM signal period. The dithering of the PWM signal period enables the time delay circuit to be “reset” so that an infinite delay circuit is not required. The time delay circuit provides short term (one cycle) frequency adjustment so that the resulting PWM cycle is not dithered and has a period at the desired frequency resolution.

Abstract translation: 使用PWM计数器的频率抖动和可变时间延迟电路的组合可以实现可实现的电路组件和时钟工作频率的改进的PWM频率分辨率。 可控延时电路在第一个PWM周期期间延长PWM信号。 在第二个PWM周期期间，PWM周期增加超过所需的量，但是在该第二个PWM周期期间延迟减小以实现正确的（期望的）PWM信号周期。 PWM信号周期的抖动使得时间延迟电路“复位”，从而不需要无限延迟电路。 时间延迟电路提供短期（一个周期）频率调整，使得所得到的PWM周期不抖动，并具有期望频率分辨率的周期。

公开(公告)号：US07593500B2

公开(公告)日：2009-09-22

申请号：US12049415

申请日：2008-03-17

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03D3/24 ,  H03M5/08

CPC classification number: H03K7/08

Abstract: A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM, multiphase PWM, current limit PWM, current reset PWM, and independent time base PWM while further providing automatic triggering for an analog-to-digital conversion (ADC) module that is precisely timed relative to the PWM signals. Applications include control of a switching power supply that requires very high speed operation to obtain high resolution at high switching frequencies, and the ability to vary the phase relationships among the PWM output signals driving the power supply power components. A single PWM duty cycle register may be used for updating any and/or all PWM generators at once to reduce the workload of a digital processor as compared to updating multiple duty cycle registers.

Abstract translation: 脉宽调制（PWM）发生器具有非常高的速度和高分辨率能力，能够产生标准互补PWM，推挽PWM，可变偏移PWM，多相PWM，限流PWM，电流复位PWM和独立时基PWM 同时进一步提供相对于PWM信号精确定时的模数转换（ADC）模块的自动触发。 应用包括控制开关电源，其需要非常高的速度操作以在高开关频率下获得高分辨率，以及改变驱动电源功率部件的PWM输出信号之间的相位关系的能力。 与更新多个占空比寄存器相比，可以使用单个PWM占空比寄存器来一次更新任何和/或所有PWM发生器，以减少数字处理器的工作负载。

公开(公告)号：US20090002043A1

公开(公告)日：2009-01-01

申请号：US12045759

申请日：2008-03-11

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03K3/017 ,  H03H11/26

CPC classification number: H03K7/08 ,  H03K3/017 ,  H03M1/68 ,  H03M1/822

Abstract: Using a combination of frequency dithering of a PWM counter and a variable time delay circuit yields improved PWM frequency resolution with realizable circuit components and clock operating frequencies. A controllable time delay circuit lengthens a PWM signal during the first PWM cycle. During the second PWM cycle, the PWM period is increased beyond the desired amount, but the delay is reduced during this second PWM cycle to achieve the correct (desired) PWM signal period. The dithering of the PWM signal period enables the time delay circuit to be “reset” so that an infinite delay circuit is not required. The time delay circuit provides short term (one cycle) frequency adjustment so that the resulting PWM cycle is not dithered and has a period at the desired frequency resolution.

Abstract translation: 使用PWM计数器的频率抖动和可变时间延迟电路的组合可以实现可实现的电路组件和时钟工作频率的改进的PWM频率分辨率。 可控延时电路在第一个PWM周期期间延长PWM信号。 在第二个PWM周期期间，PWM周期增加超过所需的量，但是在该第二个PWM周期期间延迟减小以实现正确的（期望的）PWM信号周期。 PWM信号周期的抖动使得时间延迟电路“复位”，从而不需要无限延迟电路。 时间延迟电路提供短期（一个周期）频率调整，使得所得到的PWM周期不抖动，并具有期望频率分辨率的周期。

公开(公告)号：US07433404B2

公开(公告)日：2008-10-07

申请号：US12049402

申请日：2008-03-17

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03K7/08 ,  H02M1/12

CPC classification number: H03K7/08

Abstract: A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM, multiphase PWM, current limit PWM, current reset PWM, and independent time base PWM while further providing automatic triggering for an analog-to-digital conversion (ADC) module that is precisely timed relative to the PWM signals. Applications include control of a switching power supply that requires very high speed operation to obtain high resolution at high switching frequencies, and the ability to vary the phase relationships among the PWM output signals driving the power supply power components. A single PWM duty cycle register may be used for updating any and/or all PWM generators at once to reduce the workload of a digital processor as compared to updating multiple duty cycle registers.

Abstract translation: 脉宽调制（PWM）发生器具有非常高的速度和高分辨率能力，能够产生标准互补PWM，推挽PWM，可变偏移PWM，多相PWM，限流PWM，电流复位PWM和独立时基PWM 同时进一步提供相对于PWM信号精确定时的模数转换（ADC）模块的自动触发。 应用包括控制开关电源，其需要非常高的速度操作以在高开关频率下获得高分辨率，以及改变驱动电源功率部件的PWM输出信号之间的相位关系的能力。 与更新多个占空比寄存器相比，可以使用单个PWM占空比寄存器来一次更新任何和/或所有PWM发生器，以减少数字处理器的工作负载。

公开(公告)号：US20080159381A1

公开(公告)日：2008-07-03

申请号：US12049424

申请日：2008-03-17

Applicant: Bryan Kris

Inventor： Bryan Kris

IPC: H03K7/08

CPC classification number: H03K7/08

Abstract: A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM, multiphase PWM, current limit PWM, current reset PWM, and independent time base PWM while further providing automatic triggering for an analog-to-digital conversion (ADC) module that is precisely timed relative to the PWM signals. Applications include control of a switching power supply that requires very high speed operation to obtain high resolution at high switching frequencies, and the ability to vary the phase relationships among the PWM output signals driving the power supply power components. A single PWM duty cycle register may be used for updating any and/or all PWM generators at once to reduce the workload of a digital processor as compared to updating multiple duty cycle registers.

Abstract translation: 脉宽调制（PWM）发生器具有非常高的速度和高分辨率能力，能够产生标准互补PWM，推挽PWM，可变偏移PWM，多相PWM，限流PWM，电流复位PWM和独立时基PWM 同时进一步提供相对于PWM信号精确定时的模数转换（ADC）模块的自动触发。 应用包括控制开关电源，其需要非常高的速度操作以在高开关频率下获得高分辨率，以及改变驱动电源功率部件的PWM输出信号之间的相位关系的能力。 与更新多个占空比寄存器相比，可以使用单个PWM占空比寄存器来一次更新任何和/或所有PWM发生器，以减少数字处理器的工作负载。