Transmitter And Receiver Using Asymmetric Transfer Characteristics in Differential Amplifiers To Suppress Noise
    21.
    发明申请
    Transmitter And Receiver Using Asymmetric Transfer Characteristics in Differential Amplifiers To Suppress Noise 有权
    发射机和接收机使用差分放大器中的非对称传输特性抑制噪声

    公开(公告)号:US20090137208A1

    公开(公告)日:2009-05-28

    申请号:US12275686

    申请日:2008-11-21

    摘要: An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differential data signal pairs from each of a transmission line and a transmitter. The output circuitry receives signals from the differential amplifier pair and, in response, forms single-ended output logic signals. The output amplifier suppresses electronic input noise throughput using an asymmetric transfer characteristic that offsets output signal logic levels with respect to input noise signal levels. The asymmetric transfer characteristic is produced by skewing a transfer characteristic of the differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair. The output logic signals represent data received on the transmission line, and are provided to the receiver.

    摘要翻译: 输出放大器被提供用于双向通信接口,例如将发射器和接收器连接到传输线。 输出放大器包括连接到输出电路的差分放大器对。 差分放大器对从传输线和发送器中的每一个接收差分数据信号对。 输出电路从差分放大器对接收信号,作为响应,形成单端输出逻辑信号。 输出放大器使用偏移相对于输入噪声信号电平的输出信号逻辑电平的非对称传输特性来抑制电子输入噪声吞吐量。 非对称传输特性是通过在差分放大器对的输出侧使用不对称晶体管配置来歪斜差分放大器对的传输特性而产生的。 输出逻辑信号表示在传输线上接收的数据,并提供给接收机。

    Bi-directional bridge circuit having high common mode rejection and high input sensitivity

    公开(公告)号:US20060256744A1

    公开(公告)日:2006-11-16

    申请号:US11441669

    申请日:2006-05-25

    IPC分类号: H04B1/58 H04B3/30

    摘要: A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate differential amplifiers using bias signals generated in response to an output common mode feedback voltage from each of the differential amplifiers. An output amplifier combines the positive and negative polarity data signals to form single-ended output logic signals. The output logic signals represent data received on the transmission line, and are provided to the receiver.

    Bi-directional bridge circuit having high common mode rejection and high input sensitivity
    23.
    发明授权
    Bi-directional bridge circuit having high common mode rejection and high input sensitivity 有权
    具有高共模抑制和高输入灵敏度的双向电桥电路

    公开(公告)号:US08116240B2

    公开(公告)日:2012-02-14

    申请号:US12573847

    申请日:2009-10-05

    IPC分类号: H04B3/20 H04B1/52 H04B1/58

    摘要: A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate differential amplifiers using bias signals generated in response to an output common mode feedback voltage from each of the differential amplifiers. An output amplifier combines the positive and negative polarity data signals to form single-ended output logic signals. The output logic signals represent data received on the transmission line, and are provided to the receiver.

    摘要翻译: 提供了将发射器和接收器或收发器连接到传输线的双向通信接口。 在一个实施例中,双向接口使用两个单独的差分放大器产生正极性和负极性数据信号,差分放大器从差分链路的每一侧接收到传输线和发射器的差分信号对。 双向接口通过响应于来自每个差分放大器的输出共模反馈电压产生的偏置信号来控制每个单独的差分放大器中的共模抑制。 输出放大器组合正极性和负极性数据信号,形成单端输出逻辑信号。 输出逻辑信号表示在传输线上接收的数据,并提供给接收机。

    Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals
    24.
    发明授权
    Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals 有权
    使用非对称传输特性的差分放大器抑制输出逻辑信号中的输入噪声

    公开(公告)号:US07456648B2

    公开(公告)日:2008-11-25

    申请号:US11330047

    申请日:2006-01-10

    IPC分类号: H03K17/16

    摘要: An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differential data signal pairs from each of a transmission line and a transmitter. The output circuitry receives signals from the differential amplifier pair and, in response, forms single-ended output logic signals. The output amplifier suppresses electronic input noise throughput using an asymmetric transfer characteristic that offsets output signal logic levels with respect to input noise signal levels. The asymmetric transfer characteristic is produced by skewing a transfer characteristic of the differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair. The output logic signals represent data received on the transmission line, and are provided to the receiver.

    摘要翻译: 输出放大器被提供用于双向通信接口,例如将发射器和接收器连接到传输线。 输出放大器包括连接到输出电路的差分放大器对。 差分放大器对从传输线和发送器中的每一个接收差分数据信号对。 输出电路从差分放大器对接收信号,作为响应,形成单端输出逻辑信号。 输出放大器使用偏移相对于输入噪声信号电平的输出信号逻辑电平的非对称传输特性来抑制电子输入噪声吞吐量。 非对称传输特性是通过在差分放大器对的输出侧使用不对称晶体管配置来歪斜差分放大器对的传输特性而产生的。 输出逻辑信号表示在传输线上接收的数据,并提供给接收机。

    Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals

    公开(公告)号:US20060170449A1

    公开(公告)日:2006-08-03

    申请号:US11330047

    申请日:2006-01-10

    IPC分类号: H03K17/16

    摘要: An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differential data signal pairs from each of a transmission line and a transmitter. The output circuitry receives signals from the differential amplifier pair and, in response, forms single-ended output logic signals. The output amplifier suppresses electronic input noise throughput using an asymmetric transfer characteristic that offsets output signal logic levels with respect to input noise signal levels. The asymmetric transfer characteristic is produced by skewing a transfer characteristic of the differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair. The output logic signals represent data received on the transmission line, and are provided to the receiver.

    Methods and systems for sending side-channel data during data inactive period
    26.
    发明授权
    Methods and systems for sending side-channel data during data inactive period 有权
    在数据无效期间发送侧信道数据的方法和系统

    公开(公告)号:US06954491B1

    公开(公告)日:2005-10-11

    申请号:US09881271

    申请日:2001-06-14

    CPC分类号: H04N7/083 H04B1/406 H04L25/45

    摘要: The present invention relates to a serial interface transmission system with more than one data line, in which the transmitted data has in-band and out-of-band characters. More particularly, the present invention relates to methods and systems for sending side channel data over a high-speed digital communications link, e.g., a video link. One embodiment of the invention provides a high-speed digital transmitter capable of sending side channel data. The transmitter includes a channel zero encoder, a multiplexer, data enable out (DEout) control logic, and a channel one encoder. The channel one encoder receives input from the channel one multiplexer and the channel one DEout control logic. Another embodiment of the invention provides a high-speed digital receiver capable of receiving side channel data. The receiver includes a channel zero decoder, a channel one decoder, DEI signal and FIFO control signal recovery logic, and a channel one de-multiplexer. The DEI signal and FIFO control signal recovery logic receives input from the channel one decoder. Similarly, the channel one demultiplexer receives input from the channel one decoder.

    摘要翻译: 本发明涉及具有多于一条数据线的串行接口传输系统,其中传输的数据具有带内和带外字符。 更具体地,本发明涉及用于通过高速数字通信链路(例如视频链路)发送侧信道数据的方法和系统。 本发明的一个实施例提供一种能够发送侧信道数据的高速数字发射机。 发射机包括通道零编码器,多路复用器,数据使能输出(DE>输出)控制逻辑和通道1编码器。 通道一个编码器从通道一个多路复用器和通道一个控制逻辑接收输入。 本发明的另一实施例提供一种能够接收侧信道数据的高速数字接收机。 接收机包括通道零解码器,通道一解码器,DEI信号和FIFO控制信号恢复逻辑,以及通道一个去多路复用器。 DEI信号和FIFO控制信号恢复逻辑从信道一个解码器接收输入。 类似地,信道一解复用器从信道一解码器接收输入。

    System and method for measuring pseudo pixel error rate
    27.
    发明授权
    System and method for measuring pseudo pixel error rate 有权
    用于测量伪像素误差率的系统和方法

    公开(公告)号:US06944804B1

    公开(公告)日:2005-09-13

    申请号:US09905615

    申请日:2001-07-13

    IPC分类号: H03K5/1252 H03M13/51

    摘要: A system and method for measuring and utilizing a pseudo pixel error rate in digital data transmission is disclosed. As an alternative to measuring actual pixel error rate measurement, the present invention uses a pseudo pixel error rate detection scheme where the errors occurred in the special character patterns used in data encoding are measured. A particular embodiment uses a de-glitch filter for filtering the glitches from an unfiltered data enable (DE), a delay for delaying the unfiltered DE to match the delay of the de-glitch filter, and a comparator for comparing the unfiltered DE and the filtered DE to determine the occurrence of an error. It further includes a counter to count the errors occurred.

    摘要翻译: 公开了一种在数字数据传输中测量和利用伪像素误码率的系统和方法。 作为测量实际像素误差率测量的替代方案,本发明使用伪像素误差率检测方案,其中测量在数据编码中使用的特殊字符模式中发生的错误。 特定实施例使用去毛刺滤波器来从未滤波的数据使能(DE)滤波毛刺,延迟未滤波的DE以匹配去毛刺滤波器的延迟,以及用于比较未滤波的DE和 过滤DE以确定错误的发生。 它还包括一个计数器来计算发生的错误。

    System and method for sending and receiving data signals over a clock signal line
    28.
    发明授权
    System and method for sending and receiving data signals over a clock signal line 有权
    用于通过时钟信号线发送和接收数据信号的系统和方法

    公开(公告)号:US06463092B1

    公开(公告)日:2002-10-08

    申请号:US09393235

    申请日:1999-09-09

    IPC分类号: H04B138

    摘要: The system preferably includes a unique transmitter that sends both clock and data signals over the same transmission line. The receiver uses the same transmission line to send data signals back to the transmitter. The transmitter comprises a clock generator, a decoder and a line interface. The clock generator produces a clock signal that includes a variable position falling edge. The falling edge position is decoded by the receiver to extract data from the clock signal. The receiver comprises a clock re-generator, a data decoder and a return channel encoder. The clock re-generator monitors the transmission line, receives signals, filters them and generates a clock signal at the receiver from the signal on the transmission line. The return channel encoder generates signals and asserts them on the transmission line. The signal is asserted or superimposed over the clock & data signal provided by the transmitter.

    摘要翻译: 该系统优选地包括在同一传输线上发送时钟和数据信号的唯一发射机。 接收机使用相同的传输线将数据信号发送回发射机。 发射机包括时钟发生器,解码器和线路接口。 时钟发生器产生包括可变位置下降沿的时钟信号。 下降沿位置被接收器解码以从时钟信号中提取数据。 接收机包括时钟再生器,数据解码器和返回通道编码器。 时钟再发生器监视传输线,接收信号,对它们进行滤波,并在接收机上根据传输线上的信号产生时钟信号。 返回通道编码器产生信号并在传输线上断言它们。 该信号被断言或叠加在发射机提供的时钟和数据信号上。

    Thin film transistor, method of manufacturing the same and flat panel display device having the same
    29.
    发明授权
    Thin film transistor, method of manufacturing the same and flat panel display device having the same 有权
    薄膜晶体管,其制造方法和具有该薄膜晶体管的平板显示装置

    公开(公告)号:US09035313B2

    公开(公告)日:2015-05-19

    申请号:US13408825

    申请日:2012-02-29

    IPC分类号: H01L29/786 H01L29/49

    摘要: A thin film transistor (TFT) using an oxide semiconductor as an active layer, a method of manufacturing the TFT, and a flat panel display device having the TFT include a gate electrode formed on a substrate; an active layer made of an oxide semiconductor and insulated from the gate electrode by a gate insulating layer; source and drain electrodes coupled to the active layer; and an interfacial stability layer formed on one or both surfaces of the active layer. In the TFT, the interfacial stability layer is formed of an oxide having a band gap of 3.0 to 8.0 eV. Since the interfacial stability layer has the same characteristic as a gate insulating layer and a passivation layer, chemically high interface stability is maintained. Since the interfacial stability layer has a band gap equal to or greater than that of the active layer, charge trapping is physically prevented.

    摘要翻译: 使用氧化物半导体作为有源层的薄膜晶体管(TFT),制造TFT的方法以及具有该TFT的平板显示装置包括形成在基板上的栅电极; 由氧化物半导体制成的有源层,并通过栅极绝缘层与栅电极绝缘; 源极和漏极耦合到有源层; 以及形成在活性层的一个或两个表面上的界面稳定层。 在TFT中,界面稳定层由带隙为3.0〜8.0eV的氧化物形成。 由于界面稳定层具有与栅极绝缘层和钝化层相同的特性,因此保持化学上高的界面稳定性。 由于界面稳定层具有等于或大于有源层的带隙,所以物理地防止了电荷俘获。

    Thin film transistor and method of fabricating the same
    30.
    发明授权
    Thin film transistor and method of fabricating the same 有权
    薄膜晶体管及其制造方法

    公开(公告)号:US08466462B2

    公开(公告)日:2013-06-18

    申请号:US12369051

    申请日:2009-02-11

    IPC分类号: H01L29/10

    摘要: A thin film transistor (TFT) including a gate electrode, an active layer, and source and drain electrodes. The active layer includes contact regions that contact the source and drain electrodes, which are thinner than a remaining region of the active layer. The contact regions reduce the contact resistance between the active material layer and the source and drain electrodes.

    摘要翻译: 一种薄膜晶体管(TFT),其包括栅电极,有源层以及源极和漏极。 有源层包括与源极和漏极接触的接触区,其比有源层的剩余区域薄。 接触区域减小了活性材料层与源极和漏极之间的接触电阻。