Abstract:
Embodiments are provided for an asynchronous processor with heterogeneous processors. In an embodiment, the apparatus for an asynchronous processor comprises a memory configured to cache instructions, and a first unit (XU) configured to processing a first instruction of the instructions. The apparatus also comprises a second XU having less restricted access than the first XU to a resource of the asynchronous processor and configured to process a second instruction of the instructions. The second instruction requires access to the resource. The apparatus further comprises a feedback engine configured to decode the first instruction and the second instruction, and issue the first instruction to the first XU, and a scheduler configured to send the second instruction to the second XU.
Abstract:
A number K of N sub-channels that are defined by a code and that have associated reliabilities for input bits at N input bit positions, are to be selected to carry bits that are to be encoded. A localization area that includes multiple sub-channels and is located below fewer than K of the N sub-channels in a partial order of the N sub-channels is determined based on one or more coding parameters. The fewer than K sub-channels of the N sub-channels above the localization area in the partial order are selected, and a number of sub-channels from those in the localization area are also selected. The selected fewer than K sub-channels and the number of sub-channels selected from those in the localization area together include K sub-channels to carry the bits that are to be encoded.
Abstract:
Embodiment techniques map parity bits to sub-channels based on their row weights. The row weight for a sub-channel may be viewed as the number of “ones” in the corresponding row of the Kronecker matrix or as a power of 2 with the exponent (i.e. the hamming weight) being the number of “ones” in the binary representation of the sub-channel index (further described below). In one embodiment, candidate sub-channels that have certain row weight values are reserved for parity bit(s). Thereafter, K information bits may be mapped to the K most reliable remaining sub-channels, and a number of frozen bits (e.g. N−K) may be mapped to the least reliable remaining sub-channels. Parity bits may then mapped to the candidate sub-channels, and parity bit values are determined based on a function of the information bits.
Abstract:
A clock-less asynchronous processing circuit or system utilizes a self-clocked generator to adjust the processing delay (latency) needed/allowed to the processing cycle in the circuit/system. The timing of the self-clocked generator is dynamically adjustable depending on various parameters. These parameters may include processing instruction, opcode information, type of processing to be performed by the circuit/system, or overall desired processing performance. The latency may also be adjusted to change processing performance, including power consumption, speed etc.
Abstract:
A clock-less asynchronous processing circuit or system is configured to operation in a plurality of modes. In an initialization mode (e.g., reset, initialization, boot up), a self-clocked generator associated with the asynchronous circuit is configured to generate an active complete signal (to latch output processed data) within a first period of time after receiving a trigger signal. In a normal mode, the self-clocked generator is configured to generate the active complete signal within a second period of time after receiving the trigger signal. In one embodiment, during the initialization mode, the asynchronous circuit latches the output slower than when in the normal mode.
Abstract:
Some embodiments of the present application provide a forward-propagation-only (FP-only) method of training a DNN model. Such methods result in a trained DNN model whose performance comparable to a DNN model trained using bidirectional training methods. The FP-only method for training a DNN model may operate without employing the known chain rule. The chain rule is employed when computing gradients for a backward propagation in a bidirectional method. The FP-only method may allow for the computations and updates to the parameters for each layer of the DNN model to be performed in parallel. The FP-only methods for training a DNN model use stochastic gradient descent and the FP-only method for training a DNN model still involves computing gradients. However, the FP-only methods of training a DNN model allow for computing of gradients without the chain rule.
Abstract:
Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes polar encoding, with an encoder of the device, information bits and at least one parity bit using the polar code to obtain encoded data, and transmitting the encoded data to another device. The polar code comprises a plurality of sub-channels. The at least one parity bit being placed in at least one of the plurality of sub-channels. The at least one sub-channel is selected from the plurality of sub-channels based on a weight parameter.
Abstract:
Embodiment techniques map parity bits to sub-channels based on their row weights. In one example, an embodiment technique includes polar encoding, with an encoder of the device, information bits and at least one parity bit using the polar code to obtain encoded data, and transmitting the encoded data to another device. The polar code comprises a plurality of sub-channels. The at least one parity bit being placed in at least one of the plurality of sub-channels. The at least one sub-channel is selected from the plurality of sub-channels based on a weight parameter.
Abstract:
Aspects of this disclosure provide a technique for implementing polar encoding with incremental redundancy HARQ re-transmission. In particular, a transmitter encodes a message using different polar codes to obtain a first codeword and a second codeword that is twice the length of the first codeword, and transmit the first codeword as an original transmission, and the second half of the second codeword as a re-transmission without transmitting the first half of the second codeword. Information bits that are common to both the first codeword and the second half of the second codeword is mapped to more-reliable bit-locations in the second half of the second codeword. Decoded bit values for the common information in the original transmission and retransmission is compared by the receiver to perform a parity check.
Abstract:
Embodiments of this application provide a method for encoding data in a wireless communication network. A communication device obtains an information bit sequence of a bit length K and a code length M. When M is greater than or equal to a first threshold and K is greater than or equal to a second threshold, the device divides the information bit sequence into p subsequences that are of an equal length K1. Then the device encodes each of the p subsequence to obtain p encoded subsequences. The device rate-matches each of the p encoded subsequences to obtain p rate matched subsequences, concatenates the p rate matched subsequences to obtain the output sequence of the code length M, then outputs the output sequence.