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公开(公告)号：US08466722B2
公开(公告)日：2013-06-18
申请号：US13284265
申请日：2011-10-28
IPC分类号： H03L7/00
CPC分类号： H01L27/0266
摘要： A method for startup and operation of an output stage of a transmitter, the output stage comprising a first protection field effect transistor (FET) and a second protection FET includes enabling a startup circuit; providing a first bias voltage to the first protection FET in the output stage and a second bias voltage to the second protection FET stage in the output stage by the startup circuit; disabling the startup circuit and enabling a protection voltage generator; providing the first bias voltage to the first protection FET in the output stage by the protection voltage generator; and providing the second bias voltage to the second protection FET in the output stage by a second bias voltage power supply.
摘要翻译： 一种用于启动和操作发射机的输出级的方法，所述输出级包括第一保护场效应晶体管（FET）和第二保护FET，使能启动电路; 向所述输出级中的所述第一保护FET提供第一偏置电压，以及通过所述启动电路向所述输出级中的所述第二保护FET级提供第二偏置电压; 禁用启动电路并启用保护电压发生器; 通过保护电压发生器向输出级中的第一保护FET提供第一偏置电压; 以及通过第二偏置电压电源在所述输出级中向所述第二保护FET提供所述第二偏置电压。
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公开(公告)号：US20090323875A1
公开(公告)日：2009-12-31
申请号：US12165309
申请日：2008-06-30
申请人： Marcel A. Kossel
发明人： Marcel A. Kossel
IPC分类号： H04L7/00
CPC分类号： H04L7/0338 , H03L7/0812
摘要： A method, apparatus, and system for a data synchronizer/serial link receiver that performs the alignment of the sampling clock used to retime asynchronous customer data by the application of a negative delay onto the system clock whereas the value of the applied negative delay is derived from the analysis of a temperature code obtained by a tapped delay line in conjunction with the application of preceding replica delay lines for the in-phase and quadrature clock signals.
摘要翻译： 一种用于数据同步器/串行链路接收机的方法，装置和系统，其执行用于通过将负延迟应用于系统时钟来重新定时异步客户数据的采样时钟的对准，而导出所施加的负延迟的值 结合对同相和正交时钟信号的前一个复制延迟线的应用，通过分接延迟线获得的温度代码的分析。
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23.发明申请公开(公告)号：US20090201097A1
公开(公告)日：2009-08-13
申请号：US12369021
申请日：2009-02-11
IPC分类号： H03B5/18
CPC分类号： H03B5/1228 , H03B5/1215 , H03B5/1243 , H03B5/1256 , H03B5/1287 , H03B5/1296 , H03B2201/0216
摘要： A continuously tunable inductor with an inductive-capacitive (LC) voltage controlled oscillator (VCO) having a primary coil. The inductor includes a separate isolated secondary coil, a set of transistors composing a closed loop with the secondary coil, a magnetic coupling between the primary coil of the LC VCO and the secondary coil, an electrical coupling between the LC VCO and the set of transistors composing a closed loop with the secondary coil, and means for electric current injection into the closed loop. Such an inductor can be tuned by modulating a mutual inductance, which is magnetically and electrically coupled with the LC VCO by injection of an electric current (I0).
摘要翻译： 具有电感电容（LC）压控振荡器（VCO）的连续可调电感器，具有初级线圈。 电感器包括单独的隔离次级线圈，构成与次级线圈的闭环的一组晶体管，LC VCO的初级线圈与次级线圈之间的磁耦合，LC VCO与该组晶体管之间的电耦合 与次级线圈组成闭环，以及将电流注入闭环的装置。 可以通过调制通过注入电流（I0）与LC VCO磁耦合和电耦合的互感来调谐这种电感器。
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公开(公告)号：US07378885B1
公开(公告)日：2008-05-27
申请号：US11959069
申请日：2007-12-18
申请人： Marcel A. Kossel
发明人： Marcel A. Kossel
IPC分类号： H03K21/00
CPC分类号： H03K23/00
摘要： A method for dividing a plurality of multiphase signals comprising performing resetable divider stages to the plurality of multiphase signals forming a plurality of divided multiphase signals having a monotonic increasing phase with equal spacing and an ideal duty cycle of 50% through a plurality of resetable dividers, wherein the plurality of divided multiphase signals have no phase ambiguity; and producing a plurality of periodic reset signals to the plurality of resetable dividers to enable the plurality of resetable dividers to divide the plurality of multiphase signals in a timely correct sequence to form the divided multiphase signal through a reset signal generator, the plurality of periodic reset signals being produced by a combinational network of the reset signal generator, the combination network is configured for generating a number of pulses based on the plurality of multiphase signals and performing a plurality of decimation stages and wherein the periodic reset signals are generated solely in response to the plurality of multiphase signals.
摘要翻译： 一种用于将多个多相信号分离的方法，包括对多个多相信号执行可复位分频器级，所述多相信号通过多个可复位分频器形成具有相等间隔的单调增加相位和50％的理想占空比的多个分频多相信号， 其中所述多个划分的多相信号没有相位模糊度; 以及产生多个周期性复位信号给所述多个可复位分频器，以使所述多个可复位分频器能够及时正确地排列多个多相信号，以通过复位信号发生器形成分频多相信号，所述多个周期性复位 信号由复位信号发生器的组合网络产生，所述组合网络被配置为基于所述多个多相信号产生多个脉冲并且执行多个抽取级，并且其中所述周期性复位信号仅仅响应于 多个多相信号。
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公开(公告)号：US20080111633A1
公开(公告)日：2008-05-15
申请号：US11558127
申请日：2006-11-09
IPC分类号： H03L7/089
CPC分类号： H03L7/107 , H03L7/0898 , H03L7/095 , H03L7/1072 , H03L7/23
摘要： A multi-Gigahertz, low jitter phase locked loop (PLL) with adjustable gain is disclosed. In one embodiment, properties of a fVCO signal of a PLL can be acquired. Properties can include the occurrences of different types of jitter on the fVCO signal and the lock status of the PLL. A gain control module can control at least a portion of the PLL based on an analysis of the acquired properties. For example, when the loop is locked or when there is loop filter leakage, the gain of a charge pump in the PLL can be reduced. When a charge pump mismatch is detected based on the acquired properties, additional control signals can be provided to the charge pump to correct the mismatch.
摘要翻译： 公开了一种具有可调增益的多吉赫兹低抖动锁相环（PLL）。 在一个实施例中，可以获取PLL的f VCO信号的特性。 属性可以包括在VCO上的不同类型的抖动的出现以及PLL的锁定状态。 增益控制模块可以基于所获取的属性的分析来控制PLL的至少一部分。 例如，当环路被锁定或者当存在环路滤波器泄漏时，可以减小PLL中的电荷泵的增益。 当基于获取的特性检测到电荷泵不匹配时，可以向电荷泵提供额外的控制信号以校正不匹配。
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26.发明授权Closed-loop multiphase slew rate controller for signal drive in a computer system 有权用于计算机系统中信号驱动的闭环多相转换速率控制器公开(公告)号：US09009520B2
公开(公告)日：2015-04-14
申请号：US13219816
申请日：2011-08-29
CPC分类号： G06F1/04
摘要： A slew rate controller for a computing system includes a slew rate control module, the slew rate control module further comprising a plurality of sampling modules, each sampling module corresponding to one of a plurality of phase signal inputs, wherein each sampling module receives an input signal, a reference voltage, and the sampling module's respective phase signal input, and wherein each sampling module generates a respective sample of a relationship between the input signal and the reference voltage during a time period indicated by the sampling module's respective phase signal input; and a finite state machine configured to output a slew rate control signal to control a slew rate of the input signal based on the plurality of samples from the sampling modules.
摘要翻译： 一种用于计算系统的转换速率控制器包括转换速率控制模块，所述转换速率控制模块还包括多个采样模块，每个采样模块对应于多个相位信号输入中的一个，其中每个采样模块接收输入信号 参考电压和采样模块各自的相位信号输入，并且其中每个采样模块在由采样模块的各个相位信号输入指示的时间段期间产生输入信号和参考电压之间的关系的相应采样; 以及有限状态机，被配置为基于来自所述采样模块的所述多个采样来输出转换速率控制信号以控制所述输入信号的转换速率。
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公开(公告)号：US08421573B2
公开(公告)日：2013-04-16
申请号：US12367008
申请日：2009-02-06
CPC分类号： H03H7/185
摘要： An inductor including a primary coil coaxially arranged and operated in parallel with isolated secondary coils each including at least one loop winding with two open-circuited ports. At least one phase shifting device is arranged between open-circuited ports of at least one secondary coil. A method to operate an inductor by combining primary and secondary coils with phase shifting devices to get a wide tuning range is also provided. The method includes the step of phase shifting open-circuited ports of at least one secondary coil.
摘要翻译： 一种电感器，包括与隔离次级线圈并联布置并并联操作的初级线圈，每个线圈包括至少一个具有两个开路端口的环绕组。 至少一个相移装置布置在至少一个次级线圈的开路端口之间。 还提供了通过将初级和次级线圈与相移装置组合以获得宽的调谐范围来操作电感器的方法。 该方法包括相移至少一个次级线圈的开路端口的步骤。
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公开(公告)号：US20120327995A1
公开(公告)日：2012-12-27
申请号：US13600609
申请日：2012-08-31
申请人： Marcel A. Kossel , Thomas H. Toifl
发明人： Marcel A. Kossel , Thomas H. Toifl
IPC分类号： H04L27/01
CPC分类号： H04L25/03343
摘要： A method for sending data to a memory chip includes receiving data at a data transmitter disposed on a memory hub chip, applying Tomlinson-Harashima precoding (THP) equalization to the data prior to transmitting the data; and transmitting the data from the transmitter to a memory chip.
摘要翻译： 将数据发送到存储器芯片的方法包括：在设置在存储器集线器芯片上的数据发送器处接收数据，在发送数据之前对该数据应用Tomlinson-Harashima预编码（THP）均衡; 以及将数据从发送器发送到存储器芯片。
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公开(公告)号：US20120243599A1
公开(公告)日：2012-09-27
申请号：US13072008
申请日：2011-03-25
申请人： Marcel A. Kossel , Thomas H. Toifl
发明人： Marcel A. Kossel , Thomas H. Toifl
IPC分类号： H04L27/01
CPC分类号： H04L25/03343
摘要： A system includes a memory hub chip including a Tomlinson-Harashima precoding (THP) equalizer portion operative to perform transmitter equalization at the memory hub chip and send data from to a memory chip.
摘要翻译： 一种系统包括存储器集线器芯片，其包括Tomlinson-Harashima预编码（THP）均衡器部分，其操作以在存储器集线器芯片处执行发射机均衡，并将数据发送到存储器芯片。
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公开(公告)号：US20120025888A1
公开(公告)日：2012-02-02
申请号：US12845966
申请日：2010-07-29
申请人： Marcel A. Kossel , Daihyun Lim
发明人： Marcel A. Kossel , Daihyun Lim
IPC分类号： G06F1/04
CPC分类号： G06F1/04
摘要： A phase rotator includes a phase selector stage operative to receive a clock signal and output a first phase and a second phase of the clock signal, a slew rate control stage including a first pass gate circuit operative to control a slew rate of the first phase of the clock signal and a second pass gate circuit operative to control a slew rate of the second phase of the clock signal, and a phase blending stage operative to combine the first phase with the second phase of the clock signal and output a phase rotated signal.
摘要翻译： 相位旋转器包括相位选择器级，其操作以接收时钟信号并输出时钟信号的第一相位和第二相位;转换速率控制级，包括第一通过门电路，其操作以控制第一相位的转换速率 所述时钟信号和第二传递门电路可操作以控制所述时钟信号的第二相位的转换速率，以及相位混合级，用于将所述第一相位与所述时钟信号的所述第二相位组合并输出相位旋转信号。
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