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公开(公告)号:US20170300433A1
公开(公告)日:2017-10-19
申请号:US15518195
申请日:2014-10-29
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Melvin K. Benedict , Michael R. Krause , Mitchel E. Wright
IPC: G06F13/16 , G06F15/78 , H04L12/911
CPC classification number: G06F13/1668 , G06F13/1694 , G06F15/7821 , H04L47/70
Abstract: A memory controller of a sender node issues an instruction of a trans-fabric instruction set of instructions to a receiver node across a communication fabric that supports memory semantic operations, to cause a given transaction to be performed at the receiver node in response to the issued instruction.
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公开(公告)号:US20170075846A1
公开(公告)日:2017-03-16
申请号:US15229908
申请日:2016-08-05
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Michael R. Krause
IPC: G06F13/40 , G06F12/0813 , G06F11/20
CPC classification number: G06F13/4059 , G06F11/2025 , G06F11/2066 , G06F12/0813 , G06F12/1081 , G06F2212/1016 , G06F2212/314 , H04L47/10
Abstract: The present disclosure provides an electronic device that includes a lower device configured to process local input/output communications between the electronic device and a host, wherein the lower device is stateless. The electronic device also includes a memory comprising a data flow identifier used to associate a data flow resource of the host with a data flow resource corresponding to the lower device. A data packet sent from the lower device to the host includes the data flow identifier.
Abstract translation: 本公开提供一种电子设备,其包括被配置为处理电子设备和主机之间的本地输入/输出通信的下部设备,其中下部设备是无状态的。 电子设备还包括存储器,其包括用于将主机的数据流资源与对应于下部设备的数据流资源相关联的数据流标识符。 从下位机向主机发送的数据包包括数据流标识符。
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公开(公告)号:US20160113143A1
公开(公告)日:2016-04-21
申请号:US14977095
申请日:2015-12-21
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Martin Goldstein , Dale C. Morris , Michael R. Krause
CPC classification number: H05K7/1489 , B23P19/00 , G06F1/181 , H04L49/40 , H05K7/1487 , H05K7/1492
Abstract: In some examples, a chassis contains a fabric module and a plurality node modules that are arranged in a plurality of rows. The fabric module is positioned in a space between a first row and a second row of the plurality of rows, and the fabric module is connected to at least two node modules of the plurality of node modules to provide communications connectivity between the at least two node modules, the chassis to accept longitudinal insertion in a longitudinal direction of the plurality of node modules and the fabric module, the fabric module being removable in the longitudinal direction from the chassis by moving the fabric module in the space between the first row and the second row without first removing the node modules in the plurality of rows.
Abstract translation: 在一些示例中,机架包含布置在多行中的结构模块和多个节点模块。 所述织物模块位于所述多个行的第一行和第二行之间的空间中,并且所述织物模块连接到所述多个节点模块的至少两个节点模块,以提供所述至少两个节点之间的通信连接 模块,所述底盘接受在所述多个节点模块和所述织物模块的纵向方向上的纵向插入,所述织物模块通过在所述第一行和第二部分之间的空间中移动所述织物模块,从所述框架沿纵向方向可移除 行,而不首先去除多行中的节点模块。
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公开(公告)号:US11073986B2
公开(公告)日:2021-07-27
申请号:US15109375
申请日:2014-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Michael R. Krause
IPC: G06F12/08 , G06F12/0808 , G06F12/0815 , G06F3/06 , G06F12/1009 , G06F12/00 , G06F9/46
Abstract: A memory management unit receives a transaction request to perform an operation with respect to data in memory, the transaction request including control information. The memory management unit identifies, based on the control information, one of a plurality of versions of a given memory data, where the plurality of versions of the given memory data include a first version of the given memory data and a second version of the given memory data that is modified from the first version. The memory management unit accesses the identified version of the given memory data in response to the transaction request.
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25.
公开(公告)号:US10944487B2
公开(公告)日:2021-03-09
申请号:US16428756
申请日:2019-05-31
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Kevin B. Leigh , Michael R. Krause , John Norton
Abstract: Thermal control is provided for external light sources for silicon photonics based pluggable modules. In one embodiment, an apparatus comprises a first circuit board; a light source disposed upon the first circuit board; a silicon photonics modulator; a connector comprising a first portion and a second portion, wherein: the first and second portions are physically matable and separable; mating the first and second portions of the connector optically couples the first and second portions, the first portion is disposed upon the first circuit board, and is optically coupled to an output of the light source, and the second portion is optically coupled to an input of the silicon photonics modulator; and a thermal controller to control a temperature of the light source. Some embodiments disable the light source when the connector is separated.
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公开(公告)号:US20200294592A1
公开(公告)日:2020-09-17
申请号:US16352306
申请日:2019-03-13
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Michael R. Krause , Melvin K. Benedict
Abstract: A device including a controller coupled to a primary medium including data provided by a processor, the controller configured to initiate an emergency backup for the primary medium, is provided. The device also includes a secondary medium coupled to the controller, and configured to store at least a portion of the data from the primary medium in the emergency backup. The device also includes an interface configured to provide to the controller, through a main power interface for the primary medium: an emergency backup signal to start the emergency backup, and a power to the primary medium during the emergency backup. A system including the device and a non-transitory medium with instructions to use the device in an emergency backup process are also provided.
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公开(公告)号:US20200150364A1
公开(公告)日:2020-05-14
申请号:US16184462
申请日:2018-11-08
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Kevin B. Leigh , John Norton , Michael R. Krause
IPC: G02B6/42
Abstract: A housing-attachable (HA) optical connector is removably attached to a housing that is initially designed for an electrical interface with a base electrical connector on a system board. An optical fiber terminates at one end to a chip optical connector and terminates at another end to the HA optical connector. The HA optical connector is positioned with respect to the housing such that when a portion of the printed circuit board of a removable module extending outside the housing comes into contact with a base electrical connector on a system board, the HA optical connector blind mates with a base-attachable (BA) optical connector on the system board. In this manner, electrical connectivity and optical connectivity are provided between the removable module and the system board.
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公开(公告)号:US10248331B2
公开(公告)日:2019-04-02
申请号:US15313736
申请日:2014-07-23
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Michael R. Krause
Abstract: A requester sends, to a responding component, a request to cause the responding component to perform a computation. The requester sends, to the responding component, a delayed read indication, where the delayed read indication indicates that a result of the computation is not to be returned to the requester from the responding component until a data value at a target address of the delayed read indication has changed. The requester receives, from the responding component, an acknowledgment of the delayed read indication, and after receiving the acknowledgment, receives a response to the request without the requester sending another request to the responding component.
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公开(公告)号:US10061532B2
公开(公告)日:2018-08-28
申请号:US15114969
申请日:2014-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Michael R. Krause
IPC: G06F12/00 , G06F3/06 , G06F12/0804 , G06F12/0891
CPC classification number: G06F3/0647 , G06F3/0613 , G06F3/0683 , G06F12/0804 , G06F12/0891
Abstract: A system includes multiple memories. Access of at least one of the multiple memories uses an interface subsystem that includes a memory controller and a distinct media controller, the memory controller to issue a transaction-level access request. The media controller is associated with at least one memory and produces, in response to the transaction-level access request, at least one command according to a specification of the at least one memory. Data is migrated from a first of the multiple memories to a second of the multiple memories, without the data traversing through a cache memory in the processor during the migrating.
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公开(公告)号:US10031863B2
公开(公告)日:2018-07-24
申请号:US15109334
申请日:2014-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Michael R. Krause
IPC: G06F17/00 , G06F12/08 , G06F12/0808 , G06F12/0815 , G06F12/14 , H04L29/06 , G06F3/06
Abstract: A first component associated with an access controlled memory region receives a transaction request including a protocol header from a second component. The first component sends, to the second component, a negative acknowledgment in response to determining that the second component is not authorized to access the access controlled memory region, based on information in the protocol header.
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