公开(公告)号：US09859161B2

公开(公告)日：2018-01-02

申请号：US15451175

申请日：2017-03-06

Applicant: IMEC vzw

Inventor： Juergen Boemmels ,  Zsolt Tokei ,  Christopher Wilson

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76897 ,  H01L21/76816 ,  H01L21/76819 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53295

Abstract: An interconnect structure and a method for forming it is disclosed. In one aspect, the method includes the steps of providing a first entity. The first entity includes a first set of line structures. The first set of line structures include a first set of conductive lines, and a first set of dielectric lines made of a first dielectric material and aligned with and overlaying the first set of conductive lines. The first entity also includes gaps separating the line structures and filled with a second dielectric material of such a nature that the first dielectric material can be selectively etched with respect to the second dielectric material. The method also includes providing a patterned mask on the first entity. The method further includes etching selectively the first dielectric material through the patterned mask so as to form one or more vias in the first dielectric material. The method also includes removing the patterned mask.

公开(公告)号：US09553586B2

公开(公告)日：2017-01-24

申请号：US14565316

申请日：2014-12-09

Applicant: IMEC VZW

Inventor： Jan Genoe ,  Soeren Steudel ,  Zsolt Tokei

IPC: H03K19/0185 ,  H03K17/693 ,  G06F9/455 ,  H03K19/177 ,  H01L27/06 ,  H01L27/108

CPC classification number: H03K19/018585 ,  H01L27/0688 ,  H01L27/10873 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H03K19/1776 ,  H03K19/17796

Abstract: A Field-Programmable Gate Array device is provided with programmable interconnect points in the form of interconnect circuits comprising one or more pass transistors, wherein at least some components of the interconnect circuits are implemented in the Back-End-Of-Line part of the Field-Programmable Gate Array device's production process. The memory element in an interconnect point is not produced as a Static Random Access Memory cell, but as a Dynamic Random Access Memory cell, requiring only a single select transistor and a storage capacitor for each memory element. The fabrication of at least the select transistor and the pass transistor involves the use of a thin film semiconductor layer, e.g., Indium Gallium Zinc Oxide, enabling production of transistors with low leakage in the Back-End-Of-Line.

Abstract translation: 现场可编程门阵列器件提供有包括一个或多个传输晶体管的互连电路形式的可编程互连点，其中互连电路的至少一些部件被实现在场的后端部分 - 可编程门阵列器件的生产工艺。 互连点中的存储元件不是作为静态随机存取存储器单元产生的，而是作为动态随机存取存储器单元，仅对每个存储元件仅需要一个选择晶体管和存储电容器。 至少选择晶体管和传输晶体管的制造涉及使用诸如铟镓锌氧化物的薄膜半导体层，使得能够在后端在线生产具有低泄漏的晶体管。

公开(公告)号：US20150162913A1

公开(公告)日：2015-06-11

申请号：US14565316

申请日：2014-12-09

Applicant: IMEC VZW

Inventor： Jan Genoe ,  Soeren Steudel ,  Zsolt Tokei

IPC: H03K19/0185

CPC classification number: H03K19/018585 ,  H01L27/0688 ,  H01L27/10873 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H03K19/1776 ,  H03K19/17796

Abstract: A Field-Programmable Gate Array device is provided with programmable interconnect points in the form of interconnect circuits comprising one or more pass transistors, wherein at least some components of the interconnect circuits are implemented in the Back-End-Of-Line part of the Field-Programmable Gate Array device's production process. The memory element in an interconnect point is not produced as a Static Random Access Memory cell, but as a Dynamic Random Access Memory cell, requiring only a single select transistor and a storage capacitor for each memory element. The fabrication of at least the select transistor and the pass transistor involves the use of a thin film semiconductor layer, e.g., Indium Gallium Zinc Oxide, enabling production of transistors with low leakage in the Back-End-Of-Line.

Abstract translation: 现场可编程门阵列器件提供有包括一个或多个传输晶体管的互连电路形式的可编程互连点，其中互连电路的至少一些部件被实现在场的后端部分 - 可编程门阵列器件的生产工艺。 互连点中的存储元件不是作为静态随机存取存储器单元产生的，而是作为动态随机存取存储器单元，仅对每个存储元件仅需要一个选择晶体管和存储电容器。 至少选择晶体管和传输晶体管的制造涉及使用诸如铟镓锌氧化物的薄膜半导体层，使得能够在后端在线生产具有低泄漏的晶体管。