Abstract:
At least a first shunt switching element and switching control circuitry of a first switching power supply are disclosed. At least the first shunt switching element is coupled between a ground and an output inductance node of the first switching power supply. The first switching power supply provides a buck output signal from the output inductance node. The switching control circuitry selects one of an ON state and an OFF state of the first shunt switching element. When the buck output signal is above a first threshold, the switching control circuitry is inhibited from selecting the ON state. The first switching power supply provides a first switching power supply output signal based on the buck output signal. By using feedback based on the buck output signal, the switching control circuitry may refine the timing of switching between series switching elements and shunt switching elements to increase efficiency.
Abstract:
A direct current (DC)-DC converter having a DC-DC converter semiconductor die and an alpha flying capacitive element is disclosed. The DC-DC converter semiconductor die includes a first series alpha switching element, a second series alpha switching element, a first alpha flying capacitor connection node, which is about over the second series alpha switching element, and a second alpha flying capacitor connection node, which is about over the first series alpha switching element. The alpha flying capacitive element is electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node. By locating the first alpha flying capacitor connection node and the second alpha flying capacitor connection node about over the second series alpha switching element and the first series alpha switching element, respectively, lengths of transient current paths may be minimized, thereby reducing noise and potential interference.
Abstract:
The present disclosure relates to a direct current (DC)-DC converter, which includes a charge pump based radio frequency (RF) power amplifier (PA) envelope power supply and a charge pump based PA bias power supply. The DC-DC converter is coupled between RF PA circuitry and a DC power supply, such as a battery. As such, the PA envelope power supply provides an envelope power supply signal to the RF PA circuitry and the PA bias power supply provides a bias power supply signal to the RF PA circuitry. Both the PA envelope power supply and the PA bias power supply receive power via a DC power supply signal from the DC power supply. The PA envelope power supply includes a charge pump buck converter and the PA bias power supply includes a charge pump.
Abstract:
Embodiments of the present disclosure relate to multi-mode multi-band radio frequency (RF) power amplifier (PA) circuitry, which includes a multi-mode multi-band quadrature RF PA coupled to multi-mode multi-band switching circuitry via a single output. The switching circuitry provides at least one non-linear mode output and multiple linear mode outputs. The non-linear mode output may be associated with at least one non-linear mode RF communications band and each linear mode output may be associated with a corresponding linear mode RF communications band. The outputs from the switching circuitry may be coupled to an antenna port via front-end aggregation circuitry. The quadrature nature of the quadrature PA path may provide tolerance for changes in antenna loading conditions.
Abstract:
Radio Frequency (RF) signal conditioning circuitry, which includes RF detection circuitry and RF attenuation circuitry is disclosed. The RF detection circuitry receives and detects an RF sample signal to provide an RF detection signal. The RF attenuation circuitry has an attenuation circuitry input, and receives and attenuates the RF sample signal via the attenuation circuitry input to provide an attenuated RF signal. The RF attenuation circuitry presents an attenuation circuitry input impedance at the attenuation circuitry input. The attenuated RF signal and the RF detection signal are provided concurrently.
Abstract:
A sample-and-hold (SAH) current estimating circuit and a first switching power supply are disclosed. The first switching power supply provides a first switching power supply output signal based on a series switching element and a setpoint. The SAH current estimating circuit samples a voltage across the series switching element of the first switching power supply during an ON state of the series switching element and during a ramping signal peak to provide an SAH output signal based on an estimate of an output current of the first switching power supply output signal. The first switching power supply selects the ON state of the series switching element, such that during the ramping signal peak, the series switching element has a series current having a magnitude, which is about equal to a magnitude of the output current of the first switching power supply output signal.
Abstract:
An electromechanical circuit uses a plunger to open and close a circuit as an indication of the position of a flip portion of a mobile communication device. The plunger includes an electrically conductive portion which slidingly contacts a contact pad. Upon contacting the contact pad, a change in logic states occurs which triggers circuitry to activate or de-activate the internal electronics within the communication device. This allows a user, for example, to activate a phone to receive a call without having to depress a specified switch. A common cam-follower mechanical configuration is used to cause the plunger to translate axially as the flip portion is moved.
Abstract:
The present disclosure relates to a flexible direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply. The charge pump buck power supply and the buck power supply are voltage compatible with one another at respective output inductance nodes to provide flexibility. In one embodiment of the DC-DC converter, capacitances at the output inductance nodes are at least partially isolated from one another by using at least an isolating inductive element between the output inductance nodes to increase efficiency. In an alternate embodiment of the DC-DC converter, the output inductance nodes are coupled to one another, such that the charge pump buck power supply and the buck power supply share a first inductive element, thereby eliminating the isolating inductive element, which reduces size and cost but may also reduce efficiency.
Abstract:
Embodiments of the present disclosure relate to an overlay class F choke of a radio frequency (RF) power amplifier (PA) stage and an RF PA amplifying transistor of the RF PA stage. The overlay class F choke includes a pair of mutually coupled class F inductive elements, which are coupled in series between a PA envelope power supply and a collector of the RF PA amplifying transistor. In one embodiment of the RF PA stage, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using the RF PA amplifying transistor. The collector of the RF PA amplifying transistor provides the RF stage output signal. The PA envelope power supply provides an envelope power supply signal to the overlay class F choke. The envelope power supply signal provides power for amplification.
Abstract:
Power amplifier (PA) control circuitry and PA bias circuitry are disclosed. During one slot of a multislot transmit burst from radio frequency (RF) PA circuitry, the PA control circuitry selects one PA bias level of the RF PA circuitry and the RF PA circuitry has one output power level. The RF PA circuitry has a next output power level during an adjacent next slot of the multislot transmit burst. If the one output power level exceeds the next output power level by more than a power drop limit, then the PA control circuitry maintains the one PA bias level during the adjacent next slot. If the one output power level significantly exceeds the next output power level, but by less than the power drop limit, then the PA control circuitry selects a next PA bias level, which is less than the one PA bias level, during the adjacent next slot.