-
公开(公告)号：US20240348211A1
公开(公告)日：2024-10-17
申请号：US18624973
申请日：2024-04-02
申请人： pSemi Corporation
发明人： Jonathan James Klaren , David Kovac , Eric S. Shapiro , Christopher C. Murphy , Robert Mark Englekirk , Keith Bargroff , Tero Tapio Ranta
CPC分类号： H03F1/223 , H03F1/301 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/105 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/42 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/498 , H03F2200/555 , H03F2200/61 , H03F2200/78
摘要： Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
-
公开(公告)号：US11742802B2
公开(公告)日：2023-08-29
申请号：US17531510
申请日：2021-11-19
申请人： pSemi Corporation
发明人： Poojan Wagh , Kashish Pal , Robert Mark Englekirk , Tero Tapio Ranta , Keith Bargroff , Simon Edward Willard
CPC分类号： H03F1/0211 , H03F1/0261 , H03F1/223 , H03F3/193 , H03F2200/18 , H03F2200/21 , H03F2200/451 , H03F2200/522
摘要： Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.
-
公开(公告)号：US11671058B2
公开(公告)日：2023-06-06
申请号：US17950708
申请日：2022-09-22
申请人： pSemi Corporation
发明人： Poojan Wagh , Kashish Pal
CPC分类号： H03F1/0227 , H03F1/223 , H03F1/301 , H03F1/56 , H03F3/189 , H03F3/193 , H03F2200/18 , H03F2200/249 , H03F2200/453
摘要： Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.
-
公开(公告)号：US20190181816A1
公开(公告)日：2019-06-13
申请号：US16280180
申请日：2019-02-20
发明人： Shota ISHIHARA , Seiko ONO , Yusuke SHIMAMUNE , Fuminori MORISAWA , Shizuki NAKAJIMA , Yuri HONDA , Kazuhiro KOSHIO , Masato SATO
CPC分类号： H03F3/21 , H03F1/0261 , H03F1/22 , H03F1/34 , H03F3/191 , H03F3/245 , H03F2200/144 , H03F2200/18 , H03F2200/318 , H03F2200/408 , H03F2200/451
摘要： A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.
-
公开(公告)号：US20190158031A1
公开(公告)日：2019-05-23
申请号：US16250889
申请日：2019-01-17
申请人： pSemi Corporation
发明人： Jonathan James Klaren , David Kovac , Eric S. Shapiro , Christopher C. Murphy , Robert Mark Englekirk , Keith Bargroff , Tero Tapio Ranta
CPC分类号： H03F1/223 , H03F1/301 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/105 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/42 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/498 , H03F2200/555 , H03F2200/61 , H03F2200/78
摘要： Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
-
公开(公告)号：US20190123695A1
公开(公告)日：2019-04-25
申请号：US16094338
申请日：2017-04-19
申请人： Alcatel Lucent
发明人： Baoliang Feng , Jingjing Shi , Zaiqing Li
CPC分类号： H03F1/523 , H03F1/305 , H03F3/19 , H03F3/2171 , H03F2200/15 , H03F2200/18 , H03F2200/27 , H03F2200/451
摘要： Embodiments of the present disclosure provide circuitry and a method for a gallium nitride (GaN) device. The circuitry includes a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device; a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears.
-
公开(公告)号：US20190103841A1
公开(公告)日：2019-04-04
申请号：US16205904
申请日：2018-11-30
CPC分类号： H03F1/0205 , H03F1/0261 , H03F1/56 , H03F3/191 , H03F3/193 , H03F3/21 , H03F2200/18 , H03F2200/222 , H03F2200/387 , H03F2200/451 , H03F2200/75
摘要： Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
-
公开(公告)号：US20180358962A1
公开(公告)日：2018-12-13
申请号：US15616527
申请日：2017-06-07
申请人： GLOBALFOUNDRIES Inc.
发明人： Abdellatif Bellaouar
CPC分类号： H03K17/161 , H01L21/84 , H01L23/66 , H01L27/1203 , H01L28/20 , H01L28/40 , H01L29/7831 , H01L2223/6677 , H03F3/195 , H03F3/211 , H03F3/213 , H03F2200/18 , H03F2200/294 , H03F2200/451 , H04B1/44
摘要： Electronic circuits with a switch and methods for operating a switch in an electronic circuit. A first amplifier is coupled by a first path with an antenna. A second amplifier is coupled by a second path with the antenna. A transistor is coupled with the first path at a node. The first transistor includes a back gate. A back-gate bias circuit is coupled with the back gate of the first transistor. The back-gate bias circuit is configured to supply a bias voltage to the back gate of the first transistor that lowers a threshold voltage of the transistor.
-
公开(公告)号：US20180337647A1
公开(公告)日：2018-11-22
申请号：US15982548
申请日：2018-05-17
CPC分类号： H03F3/45192 , H03F2200/18 , H03M1/124 , H03M1/66 , H03M1/68 , H03M1/742 , H03M1/765
摘要： A circuit includes an input transistor pair with first and second input transistors, the first input transistor having a control terminal configured to receive an input signal and a cascode transistor pair including a first and second cascode transistors having a common control node. A bias circuit has a bias input configured to receive the input signal and a first bias output coupled to the common node of the first and second cascode transistors. The bias circuit includes a signal tracking circuit operating to generate the first bias output to track the input signal. A pair of load transistors are coupled to the input transistor pair and biased by a second bias output of the bias circuit.
-
公开(公告)号：US20180287561A1
公开(公告)日：2018-10-04
申请号：US15800779
申请日：2017-11-01
发明人： Hyeon Seok HWANG , Jong Soo LEE , Seung Chul PYO
CPC分类号： H03F1/0205 , H03F1/0261 , H03F1/301 , H03F1/3205 , H03F3/195 , H03F3/211 , H03F3/245 , H03F2200/18 , H03F2200/243 , H03F2200/366 , H03F2200/447 , H03F2200/451
摘要： A power amplifier includes an amplifying circuit configured to amplify an input signal and comprising transistors, which may be disposed in parallel with one another and divided into a first group of transistors and a second group of transistors. The power amplifier also includes a bias circuit configured to supply bias power to one of the transistors of the first group and the transistors of the second group.
-
-
-
-
-
-
-
-
-
搜索结果
1194 条记录 (耗时 0.023 秒)
