公开(公告)号：US08249294B2

公开(公告)日：2012-08-21

申请号：US12254082

申请日：2008-10-20

申请人： Masayuki Koga

发明人： Masayuki Koga

IPC分类号： G06K9/00

CPC分类号： G09G3/3655 ,  G09G3/3614 ,  G09G2330/021

摘要： A driving system that drives an electro-optic device including a plurality of pixel electrodes, a counter electrode, a plurality of storage capacitor elements, and an electro-optic material is provided. The driving system includes a supply circuit that selectively supplies voltage to first and second ends of capacitor elements corresponding to a first horizontal line. A switching circuit is also provided that switches, in sequence every predetermined period, each of the voltages to be supplied to the second end of the capacitor elements from a first voltage to a second voltage or from the second voltage to the first voltage. A control circuit electrically connects the second end of the first storage capacitor elements and to each other before the voltage switched by the switching circuit is supplied to the second end of at least one of the storage capacitor elements.

摘要翻译： 提供了驱动包括多个像素电极，对电极，多个存储电容器元件和电光材料的电光器件的驱动系统。 驱动系统包括供电电路，其选择性地将电压提供给对应于第一水平线的电容器元件的第一和第二端。 还提供了一种切换电路，其中每隔预定周期依次切换要从第一电压到第二电压或从第二电压向第一电压提供给电容器元件的第二端的每个电压。 控制电路在将由开关电路切换的电压提供给至少一个存储电容器元件的第二端之前将第一存储电容元件的第二端彼此电连接。

公开(公告)号：US20120044132A1

公开(公告)日：2012-02-23

申请号：US13030409

申请日：2011-02-18

申请人： Masayuki Koga ,  Yukiya Hirabayashi

发明人： Masayuki Koga ,  Yukiya Hirabayashi

IPC分类号： G09G3/36 ,  G09G5/00 ,  G11C19/00

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2300/0413 ,  G11C19/28

摘要： Disclosed herein is a shift register including shift register unit circuits of a plurality of stages. Each of the shift register unit circuits of the plurality of stages includes a first transistor having a source and a drain to one of which a first clock signal is input and a gate to which a second clock signal obtained by substantially inverting the first clock signal is input. When the second clock signal at one of an H level and an L level is input to the gate of the first transistor, the first clock signal at the other of the H level and the L level is input to one of the source and the drain of the first transistor.

摘要翻译： 这里公开了包括多级的移位寄存器单元电路的移位寄存器。 多级的每个移位寄存器单元电路包括具有源极和漏极的第一晶体管，其中输入第一时钟信号中的一个，并且通过基本上反相第一时钟信号而获得的第二时钟信号的栅极是 输入。 当在H电平和L电平之一处的第二时钟信号被输入到第一晶体管的栅极时，H电平和L电平中的另一个处的第一时钟信号被输入到源极和漏极之一 的第一晶体管。

公开(公告)号：US07389476B2

公开(公告)日：2008-06-17

申请号：US10636589

申请日：2003-08-08

申请人： Michiru Senda ,  Masayuki Koga ,  Masahiro Okuyama ,  Ryoichi Yokoyama ,  Isao Akima

发明人： Michiru Senda ,  Masayuki Koga ,  Masahiro Okuyama ,  Ryoichi Yokoyama ,  Isao Akima

IPC分类号： G06F15/00 ,  G06F13/00

CPC分类号： G02F1/1335 ,  G02F1/1333 ,  G02F1/133555 ,  G02F1/1345 ,  G02F1/1368 ,  G02F2001/133342 ,  G02F2001/133616 ,  G06F3/1423 ,  G09F9/35 ,  G09G3/3666 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0809 ,  G09G2300/0857 ,  G09G2310/0289 ,  H04M1/0214 ,  H04M1/0245 ,  H04M2250/16

摘要： A display allowing further miniaturization when including a plurality of display panels is obtained. This display comprises a first display panel formed on a substrate and a second display panel formed on the same substrate on a region different from that formed with the first display panel. Thus, the display can be further miniaturized as compared with that having a first display panel and a second display panel formed on different substrates.

摘要翻译： 获得当包括多个显示面板时允许进一步小型化的显示器。 该显示器包括形成在基板上的第一显示面板和形成在与形成有第一显示面板的区域不同的区域上的同一基板上的第二显示面板。 因此，与具有形成在不同基板上的第一显示面板和第二显示面板相比，显示器可以进一步小型化。

公开(公告)号：US07324075B2

公开(公告)日：2008-01-29

申请号：US10857406

申请日：2004-05-28

申请人： Keiichi Sano ,  Koji Marumo ,  Masayuki Koga ,  Kenya Uesugi ,  Michiru Senda ,  Kuni Yamamura

发明人： Keiichi Sano ,  Koji Marumo ,  Masayuki Koga ,  Kenya Uesugi ,  Michiru Senda ,  Kuni Yamamura

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0876 ,  G09G2320/0233

摘要： When a switching TFT is switched on, a data voltage on a data line is stored in a storage capacitor as a gate voltage of a driver TFT. In this state, a voltage on a pulse drive line is caused to fall. AMOS type capacity element having a second electrode connected to a reference voltage is connected to a gate of the driver TFT. The MOS type capacity element is in an ON state before a fall of the pulse drive line and becomes an OFF state during the fall, and a capacitance changes at the switching of ON state to the OFF state. Therefore, the slope of fall of the gate voltage changes, and the gate voltage after the fall on the pulse drive line can be corrected corresponding to the variation in the threshold values among driver TFTs.

摘要翻译： 当开关TFT接通时，数据线上的数据电压作为驱动器TFT的栅极电压存储在存储电容器中。 在该状态下，使脉冲驱动线上的电压下降。 具有连接到参考电压的第二电极的AMOS型电容元件连接到驱动器TFT的栅极。 MOS电容元件在脉冲驱动线下降之前处于导通状态，并且在下降期间变为断开状态，并且电容在接通状态切换到关闭状态时改变。 因此，栅极电压的下降斜率发生变化，并且能够根据驱动TFT之间的阈值的变化来校正脉冲驱动线上的下降之后的栅极电压。

公开(公告)号：US07295273B2

公开(公告)日：2007-11-13

申请号：US11466333

申请日：2006-08-22

申请人： Ryuji Nishikawa ,  Yasushi Miyajima ,  Masayuki Koga ,  Mitsugu Kobayashi

发明人： Ryuji Nishikawa ,  Yasushi Miyajima ,  Masayuki Koga ,  Mitsugu Kobayashi

IPC分类号： G02F1/1337 ,  G02F1/1333

CPC分类号： G02F1/133707 ,  G02F1/134309 ,  G02F1/134336 ,  G02F1/1362 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1393 ,  G02F2001/133765 ,  G02F2203/64

摘要： When the orientation of liquid crystal molecules in a pixel are divided by an orientation divider, a boundary of the orientation is produced at any part of the pixel. A drain signal line (54) is formed to overlap with the boundary so that a light-shielding region in the pixel is decreased and an aperture ratio can be improved. Leakage of light caused when the orientation is disturbed can be shielded by the drain signal line (54), and contrast can be enhanced. The orientation divider can be an orientation control window (36), an orientation control slope (90) or the like.

摘要翻译： 当像素中的液晶分子的取向被取向分隔器分开时，在像素的任何部分产生取向的边界。 漏极信号线（54）形成为与边界重叠，使得像素中的遮光区域减小并且可以提高开口率。 当取向受到干扰时引起的光的泄漏可以通过漏极信号线（54）屏蔽，并且可以增强对比度。 取向分隔器可以是取向控制窗（36），取向控制斜面（90）等。

公开(公告)号：US07102606B2

公开(公告)日：2006-09-05

申请号：US09820262

申请日：2001-03-28

申请人： Yasushi Miyajima ,  Masayuki Koga

发明人： Yasushi Miyajima ,  Masayuki Koga

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/066 ,  G09G2320/0219

摘要： When a gate voltage having a rectangular-shaped pulse is supplied, the voltage of a pixel electrode is pulled down and fluctuated by a fall of the gate voltage due to a parasitic capacitor formed between a gate line and the pixel electrode, i.e. a so-called drop voltage is generated. As the drop voltage depends on a time constant of a change in the gate voltage, it can be diminished by smoothing the falling edge of the gate voltage. This is achieved by, for example, providing a current discharging transistor of a gate driver 8 with a small channel width to decrease the maximum current value. By utilizing such a gate voltage, a liquid crystal display device with a small drop voltage can be provided, even when the capacitance of the parasitic capacitor is great.

摘要翻译： 当提供具有矩形脉冲的栅极电压时，像素电极的电压由于在栅极线和像素电极之间形成的寄生电容器的栅极电压的下降而下拉并波动， 产生所谓的降压。 由于降压电压取决于栅极电压变化的时间常数，所以可以通过平滑栅极电压的下降沿来减小。 这通过例如提供具有小通道宽度的栅极驱动器8的电流放电晶体管来实现，以减小最大电流值。 通过利用这样的栅极电压，即使当寄生电容器的电容大时，也可以提供具有小的压降电压的液晶显示装置。

公开(公告)号：US20060145960A1

公开(公告)日：2006-07-06

申请号：US10541373

申请日：2004-11-08

申请人： Masayuki Koga ,  Koji Marumo

发明人： Masayuki Koga ,  Koji Marumo

IPC分类号： G09G3/30

CPC分类号： G09G3/3233 ,  G09G2300/0417 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2320/0233 ,  G09G2320/043 ,  H01L27/3244

摘要： When a selection TFT (20) and a correction TFT (22) are turned on, a data voltage of a data line is stored in a storage capacitor 28 as a gate voltage of a driving TFT (24). After turning off the selection TFT (20), a voltage of a capacitor line SC falls, thereby turning on the driving TFT (24) to supply a driving current to an organic EL element (26). The correction TFT (22) is in the ON state before the capacitor line SC falls, and is turned off in the course of the fall of the line. Consequently, the capacitance of the correction TFT (22) changes during the fall of the gate voltage, and the gradient of the gate voltage fall of the driving TFT (24) is changed, thereby setting the gate voltage after the capacitor line SC falls in accordance with variation in threshold of the driving TFT (24). Particularly by disposing the driving TFT (24) and the correction TFT (22) adjacent to each other, the two TFTs are provided with the same properties to achieve effective correction.

摘要翻译： 当选择TFT（20）和校正TFT（22）导通时，数据线的数据电压作为驱动TFT（24）的栅极电压存储在存储电容器28中。 在关闭选择TFT（20）之后，电容线SC的电压下降，从而导通驱动TFT（24），向有机EL元件（26）提供驱动电流。 校正TFT（22）在电容器线SC下降之前处于导通状态，并且在线的下降过程中被关断。 因此，校正TFT（22）的电容在栅极电压的下降期间变化，并且驱动TFT（24）的栅极电压下降的梯度发生变化，从而在电容器线SC下降之后设置栅极电压 根据驱动TFT（24）的阈值变化。 特别是通过将驱动TFT（24）和校正TFT（22）相互相邻配置，两个TFT具有相同的性质以实现有效的校正。

公开(公告)号：US20050017929A1

公开(公告)日：2005-01-27

申请号：US10857406

申请日：2004-05-28

申请人： Keiichi Sano ,  Koji Marumo ,  Masayuki Koga ,  Kenya Uesugi ,  Michiru Senda ,  Kuni Yamamura

发明人： Keiichi Sano ,  Koji Marumo ,  Masayuki Koga ,  Kenya Uesugi ,  Michiru Senda ,  Kuni Yamamura

IPC分类号： H01L51/50 ,  G09F9/30 ,  G09G3/20 ,  G09G3/30 ,  H01L27/32 ,  H05B33/00 ,  H05B33/14

CPC分类号： G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0876 ,  G09G2320/0233

摘要： When a switching TFT is switched on, a data voltage on a data line is stored in a storage capacitor as a gate voltage of a driver TFT. In this state, a voltage on a pulse drive line is caused to fall. AMOS type capacity element having a second electrode connected to a reference voltage is connected to a gate of the driver TFT. The MOS type capacity element is in an ON state before a fall of the pulse drive line and becomes an OFF state during the fall, and a capacitance changes at the switching of ON state to the OFF state. Therefore, the slope of fall of the gate voltage changes, and the gate voltage after the fall on the pulse drive line can be corrected corresponding to the variation in the threshold values among driver TFTs.

摘要翻译： 当开关TFT接通时，数据线上的数据电压作为驱动器TFT的栅极电压存储在存储电容器中。 在该状态下，使脉冲驱动线上的电压下降。 具有连接到参考电压的第二电极的AMOS型电容元件连接到驱动器TFT的栅极。 MOS电容元件在脉冲驱动线下降之前处于导通状态，并且在下降期间变为断开状态，并且电容在接通状态切换到关闭状态时改变。 因此，栅极电压的下降斜率发生变化，并且能够根据驱动TFT之间的阈值的变化来校正脉冲驱动线上的下降之后的栅极电压。

公开(公告)号：US06470015B1

公开(公告)日：2002-10-22

申请号：US09153844

申请日：1998-09-15

申请人： Masayuki Koga ,  Akihisa Erami

发明人： Masayuki Koga ,  Akihisa Erami

IPC分类号： H04L900

CPC分类号： H04L63/1441 ,  H04L2012/565 ,  H04L2012/5687 ,  H04Q11/0478

摘要： A transmitting sequence changing/restoring unit receives, from an ATM control unit, ATM cells stored with the transmitting target information in a segmented state. The transmitting sequence changing/restoring unit groups the cells of this cell string by fours, adds the synchronous cell to the head each group, and changes the sequence thereof. The respective cells are transferred in the changed sequence in sections ranging from the transmitting sequence changing/restoring unit of the transmitting-side ATM node to the unit of the receiving-side ATM node. Accordingly, even if the ATM cell string is intercepted by the third part in this section, this third party cannot reproduce the original transmitting target information. The transmitting sequence changing/restoring unit of the receiving-side ATM node is capable of recognizing where the groups of the received cell string are delimited based on the synchronous cells and restoring the sequence of the ATM cells within the thus recognized group, whereby the transmitting target information can be reproduced.

摘要翻译： 发送顺序改变/恢复单元从ATM控制单元接收以分段状态存储有发送目标信息的ATM信元。 发送顺序变更/恢复单元将该单元串的单元格分组四次，将同步单元与每个组相加，并改变其顺序。 在从发送侧ATM节点的发送序列改变/恢复单元到接收侧ATM节点的单元的部分中，以改变的顺序传送各个小区。 因此，即使ATM单元串被本部分的第三部分截取，该第三方也不能再现原始发送目标信息。 接收侧ATM节点的发送顺序变更/恢复单元能够基于同步小区识别接收到的信元串的组的位置，并恢复由此识别的组内的ATM信元的序列，由此发送 目标信息可以被复制。