Servo marginalization
    21.
    发明授权
    Servo marginalization 有权
    伺服边缘化

    公开(公告)号:US09053743B2

    公开(公告)日:2015-06-09

    申请号:US13832503

    申请日:2013-03-15

    Abstract: Servo channel noise limits are defined through Viterbi decisions based on servo gate signals. Y values are used to produce a first Viterbi decision at each servo gate. Viterbi decisions and Y values are used to produce ideal Y values. Y values and ideal Y values are used to produce an error value which is adjusted by a noise factor based on estimated channel characteristics. The noise value is combined with Y values and used to produce a second Viterbi decision at each servo gate.

    Abstract translation: 通过基于伺服门信号的维特比决定来定义伺服信道噪声限制。 Y值用于在每个伺服门产生第一维特比决定。 维特比决策和Y值用于产生理想的Y值。 Y值和理想Y值用于产生基于估计的信道特性由噪声因子调整的误差值。 噪声值与Y值组合,用于在每个伺服门产生第二维特比(Viterbi)判定。

    System and method for power saving modes in multi-sensor magnetic recording
    22.
    发明授权
    System and method for power saving modes in multi-sensor magnetic recording 有权
    多传感器磁记录中省电模式的系统和方法

    公开(公告)号:US09001446B1

    公开(公告)日:2015-04-07

    申请号:US14194069

    申请日:2014-02-28

    Abstract: A system and method for power management in a hard disk drive (HDD) assembly incorporating two or more read sensors includes directing a read/write head to follow a track; depowering one or more read sensors and readpath circuits associated with the read sensors; reading an analog readback signal through the first read sensor; processing the signal through an analog front-end to generate an input signal; sampling the input signal through an analog to digital converter at a first frequency to generate a first sampling signal; sampling the input signal through a second analog to digital converter at a second frequency to generate a second sampling signal; and generating a digital output signal from either or both sampling signals at a third sampling frequency through a digital signal processor. The method may additionally comprise adjusting a sampling frequency when power level reaches a threshold.

    Abstract translation: 包含两个或更多个读取传感器的硬盘驱动器(HDD)组件中的电源管理的系统和方法包括引导读/写头跟随轨道; 降低与读取的传感器相关联的一个或多个读取传感器和读取路径电路; 通过第一个读取传感器读取模拟回读信号; 通过模拟前端处理信号以产生输入信号; 以第一频率通过模数转换器对输入信号进行采样,以产生第一采样信号; 以第二频率通过第二模数转换器对输入信号进行采样,以产生第二采样信号; 以及通过数字信号处理器以第三采样频率从一个或两个采样信号产生数字输出信号。 该方法还可以包括当功率电平达到阈值时调整采样频率。

    Systems and methods for two stage tone reduction
    23.
    发明授权
    Systems and methods for two stage tone reduction 有权
    两级色调还原的系统和方法

    公开(公告)号:US08976471B1

    公开(公告)日:2015-03-10

    申请号:US14025356

    申请日:2013-09-12

    CPC classification number: G11B20/10046 H04L25/03044 H04L25/03878

    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for tone reduction in relation to data transmission. In one case, a data processing system is disclosed that includes: a two stage tone reduction circuit including a first stage circuit and a second stage circuit; and a polarity change circuit operable to change a polarity of the second stage output to yield a tone reduction output.

    Abstract translation: 一般涉及数据处理的系统和方法,更具体地说涉及与数据传输有关的减音的系统和方法。 在一种情况下,公开了一种数据处理系统,其包括:包括第一级电路和第二级电路的二级色调降低电路; 以及极性改变电路,其可操作以改变第二级输出的极性,以产生色调降低输出。

    Servo Marginalization
    28.
    发明申请
    Servo Marginalization 有权
    伺服边缘化

    公开(公告)号:US20140254041A1

    公开(公告)日:2014-09-11

    申请号:US13832503

    申请日:2013-03-15

    Abstract: Servo channel noise limits are defined through Viterbi decisions based on servo gate signals. Y values are used to produce a first Viterbi decision at each servo gate. Viterbi decisions and Y values are used to produce ideal Y values. Y values and ideal Y values are used to produce an error value which is adjusted by a noise factor based on estimated channel characteristics. The noise value is combined with Y values and used to produce a second Viterbi decision at each servo gate.

    Abstract translation: 通过基于伺服门信号的维特比决定来定义伺服信道噪声限制。 Y值用于在每个伺服门产生第一维特比(Viterbi)决定。 维特比决策和Y值用于产生理想的Y值。 Y值和理想Y值用于产生基于估计的信道特性由噪声因子调整的误差值。 噪声值与Y值组合,用于在每个伺服门产生第二维特比(Viterbi)判定。

    Dedicated Memory Structure for Sector Spreading Interleaving
    29.
    发明申请
    Dedicated Memory Structure for Sector Spreading Interleaving 审中-公开
    用于扇区传播的专用存储器结构

    公开(公告)号:US20140244926A1

    公开(公告)日:2014-08-28

    申请号:US13777825

    申请日:2013-02-26

    CPC classification number: G11B5/012 G11B20/10527 G11B20/1217 G11B20/1866

    Abstract: The present disclosure is directed to a method for managing a memory. The method includes the step of receiving data, the data including a plurality of sectors. The method also includes the step of dividing each sector of the plurality of sectors into a plurality of data units. A further step of the method involves interleaving the plurality of data units to yield a plurality of interleaved data units. The method also includes the step of writing the plurality of interleaved data units to a disk. An additional step of the method is to de-spread the plurality of interleaved data units to yield at least one sector of the plurality of sectors.

    Abstract translation: 本公开涉及一种用于管理存储器的方法。 该方法包括接收数据的步骤,该数据包括多个扇区。 该方法还包括将多个扇区中的每个扇区划分为多个数据单元的步骤。 该方法的另一步骤涉及交织多个数据单元以产生多个交错数据单元。 该方法还包括将多个交错数据单元写入盘的步骤。 该方法的附加步骤是解扩展多个交错数据单元以产生多个扇区中的至少一个扇区。

    DIVERSITY LOOP DETECTOR WITH COMPONENT DETECTOR SWITCHING
    30.
    发明申请
    DIVERSITY LOOP DETECTOR WITH COMPONENT DETECTOR SWITCHING 有权
    多样性环路检测器与组件检测器切换

    公开(公告)号:US20140200849A1

    公开(公告)日:2014-07-17

    申请号:US13741482

    申请日:2013-01-15

    CPC classification number: H03M13/41

    Abstract: Aspects of the disclosure pertain to a system and method for providing component detector switching for a diversity loop detector. Switching between component detectors is performed via one of: a periodic state likelihood reset process, a slope-based switching process, or a cross-over connection process. The joint decision circuit switches among component detectors to promote improved performance with present of constant or transition phase offset.

    Abstract translation: 本公开的方面涉及用于为分集环路检测器提供分量检测器切换的系统和方法。 通过周期状态似然重置处理,基于斜率的切换处理或交叉连接处理之一来执行分量检测器之间的切换。 联合决策电路在组件检测器之间切换,以通过存在恒定或过渡相位偏移来促进改进的性能。

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