Abstract:
A display method using a virtual widget, an associated electronic device, and an integrated circuit are provided. The electronic device includes: a display; a plurality of sensors, a first control system; and a second control system having a controller. The first control system offloads display workloads to the second control system before the first control system has entered the sleep mode. The controller receives sensor data from the sensors and executes a virtual widget based on information of the received sensor data when the first control system has entered the sleep mode.
Abstract:
A control system includes multiple device controllers and a device root. Each of the multiple device controllers corresponds to at least one processing unit, and is arranged to receive a hint from an application processor (AP), and generate a control signal for managing the at least one processing unit according to the hint. The device root is coupled to the multiple device controllers and includes a manager, wherein the manager is arranged to manage multiple processing units corresponding to the multiple device controllers according to multiple control signals corresponding to the multiple device controllers.
Abstract:
A power management system includes at least one device, at least one memory management unit (MMU), a processor, and at least one device controller, wherein the at least one MMU corresponds to the at least one device, respectively. The processor is arranged to execute at least one access control power manager, an operating system (OS), and a hypervisor, wherein the OS is arranged to generate a trigger signal, and the hypervisor is arranged to generate a first hint according to the trigger signal. The at least one device controller is arranged to control the at least one access control power manager according to the first hint, to manage at least one power of the at least one MMU.
Abstract:
Aspects of the disclosure provide a method and an apparatus for executing a program, e.g., a neural network (NN) inference. For example, the apparatus can include an executor and a dynamic loading agent. The executor can be coupled to a second memory, and be configured to execute a portion of the NN inference loaded on the second memory from a first memory that stores the NN inference, and to generate a signal based on a progress of the execution of the NN inference. The dynamic loading agent can be coupled to the executor, the first memory and the second memory, and be configured to load a next portion of the NN inference stored in the first memory to the second memory and to manage power supplied to the first memory based on the signal from the executor and an inference executing scheme stored in the second memory.
Abstract:
A virtual machine (VM) operating system (OS) device assignment system includes a processor, wherein the processor is configured to execute a host VM, a hypervisor, a device assigner, and a guest VM. The host VM is arranged to generate a driving signal for driving a booting of the guest VM. The hypervisor is arranged to generate a first trigger signal according to the driving signal, for triggering assignment of at least one device. The device assigner is arranged to modify a descriptor to generate a modified descriptor for assigning the at least one device among a plurality of devices to the guest VM, and install the modified descriptor into a protected memory, wherein an OS of the guest VM is configured according to the modified descriptor.
Abstract:
Aspects of the disclosure provide an apparatus for executing a program that involves a plurality of operators. For example, the apparatus can include an executor and an analyzer. The executor can be configured to execute the program with at least a first one of the operators loaded on a second memory from a first memory that stores the operators and to generate a signal based on a progress of the execution of the program with the first operator. The analyzer can be coupled to the executor, the first memory and the second memory, and configured to load at least a second one of the operators of the program next to the first operator stored in the first memory to the second memory before the executor finishes execution of the program with the first operator based on the signal from the executor and an executing scheme stored in the second memory.
Abstract:
The present invention provides a microcontroller, wherein the microcontroller includes a processor, a first memory and a cache controller. The first memory includes at least a working space. The cache controller is coupled to the first memory, and is arranged for managing the working space of the first memory, and dynamically loading at least one object from a second memory to the working space of the first memory in an object-oriented manner.
Abstract:
A computing system includes a processor, and the processor is arranged to execute: a guest virtual machine (VM), a hypervisor, and a primary VM, wherein an operating system (OS) runs on the guest VM, and an application (APP) runs on the OS. The kernel of the OS includes a protection service module and a memory management unit (MMU) manager. The protection service module is arranged to receive at least one virtual address and a first size information sent by a client of the APP. The primary VM includes a protection manager, and the protection manager is arranged to obtain a physical address array and a second size information according to the at least one virtual address and the first size information sent by the protection service through the hypervisor.
Abstract:
An electronic device and associated method is provided. The electronic device includes: a plurality of subsystems including hardware resources; a battery coupled to the plurality of subsystems; and a processing unit, configured to allocate a virtual battery from the battery for each subsystem, wherein each virtual battery has a defined power budget from the battery.
Abstract:
The present invention provides a data aggregator serving between at least one data source and at least one electronic device, wherein the data aggregator is arranged to wirelessly communicate with the data source and the electronic device, and the data aggregator comprises a memory comprising a data cache, a backup memory and a FIFO buffer, and a controller for controlling a use of the memory. The controller selects at least one of the data cache, the backup memory and the FIFO buffer to store data received from the data source according to characteristics of the data provided by the data source, and forwards the data stored in the data cache, the backup memory or the FIFO buffer to the electronic device.