Methods for row hammer mitigation and memory devices and systems employing the same

    公开(公告)号:US11087819B2

    公开(公告)日:2021-08-10

    申请号:US16597694

    申请日:2019-10-09

    Abstract: Memory devices and methods of operating memory devices in which refresh management operations can be scheduled on an as-needed basis for those memory portions where activity (e.g., activations in excess of a predetermined threshold) warrants a refresh management operation are disclosed. In one embodiment, an apparatus comprises a memory including a memory location, and circuitry configured to determine a count corresponding to a number of activations at the memory location, to schedule a refresh management operation for the memory location in response to the count exceeding a first predetermined threshold, and to decrease the count by an amount corresponding to the first predetermined threshold in response to executing the scheduled refresh management operation. The circuitry may be further configured to disallow, in response to determining that the count has reached a maximum permitted value, further activations at the memory location until after the count has been decreased.

    APPARATUSES AND METHODS FOR DYNAMIC REFRESH ALLOCATION

    公开(公告)号:US20210183433A1

    公开(公告)日:2021-06-17

    申请号:US17186913

    申请日:2021-02-26

    Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic refresh allocation. Memories may be subject to row hammer attacks, where one or more wordlines are repeatedly accessed to cause data degradation in victim rows nearby to the hammered wordlines. A memory may perform background auto-refresh operations, and targeted refresh operations where victim wordlines are refreshed. The memory may monitor access patterns to the memory in order to dynamically allocate the number of targeted refresh operations and auto-refresh operations in a set of refresh operations based on if a hammer attack is occurring and the type of hammer attack which is occurring.

    APPARATUSES AND METHODS FOR DYNAMIC REFRESH ALLOCATION

    公开(公告)号:US20210057022A1

    公开(公告)日:2021-02-25

    申请号:US16549411

    申请日:2019-08-23

    Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for dynamic refresh allocation. Memories may be subject to row hammer attacks, where one or more wordlines are repeatedly accessed to cause data degradation in victim rows nearby to the hammered wordlines. A memory may perform background auto-refresh operations, and targeted refresh operations where victim wordlines are refreshed. The memory may monitor access patterns to the memory in order to dynamically allocate the number of targeted refresh operations and auto-refresh operations in a set of refresh operations based on if a hammer attack is occurring and the type of hammer attack which is occurring.

    REFRESH AND ACCESS MODES FOR MEMORY

    公开(公告)号:US20210042244A1

    公开(公告)日:2021-02-11

    申请号:US17084469

    申请日:2020-10-29

    Abstract: Apparatuses and methods related to implementing refresh and access modes for memory. The refresh and access modes can be used to configure a portion of memory. The portions of memory can correspond to protected regions of memory. The refresh and access modes can influence the security level of data stored in the protected regions of memory.

    APPARATUSES AND METHODS FOR STAGGERED TIMING OF TARGETED REFRESH OPERATIONS

    公开(公告)号:US20200321049A1

    公开(公告)日:2020-10-08

    申请号:US16375716

    申请日:2019-04-04

    Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of targeted refresh operations. A memory device may include a number of memory banks, at least some of which may be simultaneously entered into a refresh mode. A given memory bank may perform an auto-refresh operation or a targeted refresh operation, which may draw less power than the auto-refresh operation. The timing of the targeted refresh operations may be staggered between the refreshing memory banks, such that a portion of the refreshing memory banks are performing a targeted refresh operation simultaneously with a portion of the refreshing memory banks performing an auto-refresh operation.

    Row access strobe (RAS) clobber and row hammer failures using a deterministic protocol

    公开(公告)号:US12265630B2

    公开(公告)日:2025-04-01

    申请号:US18160293

    申请日:2023-01-26

    Abstract: There are provided systems and methods that include at least one memory that has a plurality of memory cells. The cells may be disposed in rows and columns. The device can further include a controller that is communicatively coupled to the at least one memory, and the controller may be configured by its hardware topology and its instruction set and/or by a communicatively coupled processor or higher level system or subsystem to maintain data integrity in the at least one memory and/or to prevent or mitigate malicious access patterns that may compromise the at least one memory. The controller may be configured to execute a deterministic protocol in conjunction with or sequentially to a probabilistic protocol to achieve one or more of the above-noted functions.

    Semiconductor device with self-lock security and associated methods and systems

    公开(公告)号:US12216806B2

    公开(公告)日:2025-02-04

    申请号:US17982403

    申请日:2022-11-07

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which self-lock security may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a predefined event associated with the memory device operation. The predefined event may include an operating parameter of the memory device, one or more commands directed to the memory device, or both. The memory device may monitor the predefined event and determine that the predefined event satisfies a threshold. The threshold may be related to a time elapsed since the predefined event has occurred or a certain pattern in the one or more commands. Subsequently, the memory device may disable a circuit configured to access the fuse array based on the determination such that an access to the fuse array is no longer allowed.

    SEMICONDUCTOR DEVICE WITH SECURE ACCESS KEY AND ASSOCIATED METHODS AND SYSTEMS

    公开(公告)号:US20230102649A1

    公开(公告)日:2023-03-30

    申请号:US18075272

    申请日:2022-12-05

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

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