公开(公告)号：US11258887B2

公开(公告)日：2022-02-22

申请号：US16908776

申请日：2020-06-23

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ilan Pardo ,  Mark B. Rosenbluth ,  Idan Burstein ,  Rui Xu ,  Oded Lempel ,  Tsofia Eshel

IPC: H04L29/06 ,  G06F12/0875 ,  G06F13/40 ,  H04L12/879 ,  H04L29/08 ,  H04L69/22 ,  H04L49/901 ,  H04L69/324 ,  H04L67/568

Abstract: In one embodiment, a computer system includes a payload sub-system including interfaces to connect with respective devices, transfer data with the respective devices, and receive write transactions from the respective devices, a classifier to classify the received write transactions into payload data and control data, and a payload cache to store the classified payload data, and a processing unit (PU) sub-system including a local PU cache to store the classified control data, wherein the payload cache and the local PU cache are different physical caches in respective different physical locations in the computer system, and processing core circuitry configured to execute software program instructions to perform control and packet processing responsively to the control data stored in the local PU cache.

公开(公告)号：US11055222B2

公开(公告)日：2021-07-06

申请号：US16565510

申请日：2019-09-10

Applicant: Mellanox Technologies, Ltd.

Inventor： Ilan Pardo ,  Noam Bloch

IPC: G06F12/08 ,  G06F12/0831 ,  G06F13/16 ,  G06F13/28 ,  G06F3/06 ,  G06F16/907 ,  G06F9/46

Abstract: Computing apparatus includes a central processing unit (CPU), including at least one core and a cache in physical proximity to the at least one core, with a system memory and a bus connecting the CPU to the memory. A peripheral device is connected to the bus and is configured to write data items via the bus to a buffer in the system memory and to write respective completion reports to the system memory upon writing the data items to the buffer. The peripheral device is configured to detect that the CPU has read a first completion report from the system memory and then read context metadata associated with the first completion report from a given address in the system memory, and is further configured, upon writing a second completion report subsequent to the first completion report and associated with the same context metadata, to stash the second completion report and the context metadata from the given address to the cache.

公开(公告)号：US20210073130A1

公开(公告)日：2021-03-11

申请号：US16565510

申请日：2019-09-10

Applicant: Mellanox Technologies, Ltd.

Inventor： Ilan Pardo ,  Noam Bloch

IPC: G06F12/0831 ,  G06F13/16 ,  G06F13/28 ,  G06F3/06 ,  G06F9/46 ,  G06F16/907

Abstract: Computing apparatus includes a central processing unit (CPU), including at least one core and a cache in physical proximity to the at least one core, with a system memory and a bus connecting the CPU to the memory. A peripheral device is connected to the bus and is configured to write data items via the bus to a buffer in the system memory and to write respective completion reports to the system memory upon writing the data items to the buffer. The peripheral device is configured to detect that the CPU has read a first completion report from the system memory and then read context metadata associated with the first completion report from a given address in the system memory, and is further configured, upon writing a second completion report subsequent to the first completion report and associated with the same context metadata, to stash the second completion report and the context metadata from the given address to the cache.