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公开(公告)号：US11379304B1
公开(公告)日：2022-07-05
申请号：US17160194
申请日：2021-01-27
Applicant: Micron Technology, Inc.
Inventor： Gerald L. Cadloni , Mark Ish , James P. Crowley
IPC: G11C29/00 , G06F11/10 , G06F11/07 , G06F12/02 , G06F12/0882 , G06F12/1081 , G06F11/30
Abstract: A total read counter, a plurality of die read counters, and a plurality of block read counters are maintained. Each die read counter is associated with a respective die of a memory device. A value of a block read counter and a value of a die read counter are determined for a specified block. Based on the value of the block read counter, the value of the die read counter, and the value of the total read counter, an estimated number of read events associated with the specified block of the memory device is determined. Responsive to determining that the estimated number of read events satisfies a predefined criterion, a media management operation of one or more pages associated with the specified block is performed.
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公开(公告)号：US11221776B2
公开(公告)日：2022-01-11
申请号：US16730919
申请日：2019-12-30
Applicant: Micron Technology, Inc.
Inventor： Mark Ish , Yiran Liu , Tom V. Geukens
IPC: G06F3/06 , G06F12/1009 , G06F11/10
Abstract: Methods, systems, and devices for metadata indication are described herein. A method includes receiving, from a host system, a read command to retrieve information from a first block of a memory device, identifying a transfer unit associated with the first block indicated in the read command, identifying an indicator in metadata of the identified transfer unit indicating that at least one sector of the transfer unit has been altered based at least in part on identifying the transfer unit, validating data of the transfer unit stored in the memory device based at least in part on identifying the indicator in the metadata, and retrieving the information stored in the first block based at least in part on validating the data of the transfer unit.
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公开(公告)号：US20210182227A1
公开(公告)日：2021-06-17
申请号：US17161303
申请日：2021-01-28
Applicant: Micron Technology, Inc.
Inventor： Lyle E. Adams , Mark Ish , Pushpa Seetamraju , Karl D. Schuh , Dan Tupy
IPC: G06F13/376 , G06F3/06 , G06F13/16
Abstract: A first operation identifier is assigned to a current operation directed to a memory component, the first operation identifier having a first entry in a first data structure that associates the first operation identifier with a first buffer identifier. It is determined whether the current operation collides with a prior operation assigned a second operation identifier, the second operation identifier having a second entry in the first data structure that associates the second operation identifier with a second buffer identifier. A latest flag is updated to indicate that the first entry is a latest operation directed to an address (1) in response to determining that the current operation collides with the prior operation and that the current and prior operations are read operations, or (2) in response to determining to determining that the current operation does not collide with a prior operation.
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公开(公告)号：US12050809B2
公开(公告)日：2024-07-30
申请号：US17675888
申请日：2022-02-18
Applicant: Micron Technology, Inc.
Inventor： Sanjay Subbarao , Steven S. Williams , Mark Ish , John Edward Maroney
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0644 , G06F3/0673 , G06F12/10
Abstract: A memory sub-system having memory cells formed on a plurality of integrated circuit dies. After receiving a command from a host system to store data, the memory sub-system queues the command to allocate pages of memory cells in a plurality of dies in the plurality of integrated circuit dies based on a determination that each of the plurality of dies is available to perform a data programming operation for the command. Based on the page application, the memory sub-system generates a portion of a media layout to at least map logical addresses of the data identified in the command to the allocated pages and receives the data from the host system. The memory sub-system stores the data into the pages using a multi-pass programming technique, where an atomic multi-pass programming operation can be configured to use at least two pages in separate planes in one or more dies in the plurality of integrated circuit dies to program at least a portion of the data.
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公开(公告)号：US11720681B2
公开(公告)日：2023-08-08
申请号：US17062146
申请日：2020-10-02
Applicant: Micron Technology, Inc.
Inventor： Yun Li , Harini Komandur Elayavalli , Mark Ish
CPC classification number: G06F21/572 , G06F9/321 , G06F11/323 , G06F11/3636 , G06F21/566 , G06F21/577
Abstract: An example method of generating an execution profile of a firmware module comprises: receiving an execution trace of a firmware module comprising a plurality of executable instructions, wherein the execution trace comprises a plurality of execution trace records, wherein each execution trace record of the plurality of execution trace records indicates a successful execution of an executable instruction identified by a program counter (PC) value; retrieving a first execution trace record of the plurality of execution trace records, wherein the first execution trace record comprises a first PC value; identifying a first executable instruction referenced by the first PC value; identifying a firmware function containing the first executable instruction; incrementing a cycle count for the firmware function by a number of cycles associated with the first executable instruction; and generating, using the cycle count, an execution profile of the firmware module.
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Patent Agency Ranking
公开(公告)号：US11709732B2
公开(公告)日：2023-07-25
申请号：US17831109
申请日：2022-06-02
Applicant: Micron Technology, Inc.
Inventor： Gerald L. Cadloni , Mark Ish , James P. Crowley
IPC: G11C29/00 , G06F11/10 , G06F11/07 , G06F12/02 , G06F12/0882 , G06F12/1081 , G06F11/30
CPC classification number: G06F11/1068 , G06F11/076 , G06F11/0772 , G06F11/3037 , G06F12/0246 , G06F12/0882 , G06F12/1081 , G06F2212/7201
Abstract: A die read counter and a block read counter are maintained for a specified block of a memory device. An estimated number of read events associated with the specified block is determined based on a value of the block read counter and a value of the die read counter. Responsive to determining that the estimated number of read events satisfies a criterion, a media management operation of one or more pages associated with the specified block is performed.
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公开(公告)号：US20230013757A1
公开(公告)日：2023-01-19
申请号：US17379118
申请日：2021-07-19
Applicant: Micron Technology, Inc.
Inventor： Ying Huang , Mark Ish
Abstract: A processing device in a memory system identifies, while the memory device is in a first state condition, a plurality of workload conditions associated with the memory device, wherein the plurality of workload conditions comprise data reflecting a performance condition of the memory device. The processing device determines, while the memory device is in the first state condition, a host rate of a host system write performance for the memory device based on one or more workload conditions of the plurality of workload conditions. The processing device determines that one or more workload conditions of the plurality of workload conditions satisfies a first threshold criterion. Responsive to determining that the one or more workload conditions of the plurality of workload conditions satisfies the first threshold criterion, the processing device detects a change in a condition of the memory device from the first state to a second state. The processing device determines, while the memory device is in the second state condition, an adjusted host rate based on the host rate and a calculated adjustment value. The processing device uses the adjusted host rate to determine a credit consuming rate for a host write operation for the memory device.
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公开(公告)号：US11249896B2
公开(公告)日：2022-02-15
申请号：US16722717
申请日：2019-12-20
Applicant: Micron Technology, Inc.
Inventor： Sanjay Subbarao , Johnny A. Lam , John E. Maroney , Mark Ish
IPC: G06F12/02 , G06F12/0873 , G06F9/355 , G06F12/0882
Abstract: A system includes integrated circuit (IC) dies having memory cells and a processing device coupled to the IC dies. The processing device performs operations including storing, within a zone map data structure, zones of a logical block address (LBA) space sequentially mapped to physical address space of the IC dies. A zone map entry in the zone map data structure corresponds to a data group written to one or more of the IC dies. The operations further include storing, within a block set data structure indexed by a block set identifier of the zone map entry, a die identifier and a block identifier for each data block of multiple data blocks of the data group, and writing multiple data groups, which are sequentially mapped across the zones, sequentially across the IC dies. Each data block can correspond to a media (or erase) block of the IC dies.
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公开(公告)号：US20210326069A1
公开(公告)日：2021-10-21
申请号：US16854282
申请日：2020-04-21
Applicant: Micron Technology, Inc.
Inventor： Mark Ish
Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to receive a read command specifying an identifier of a logical block and a page number; translate the identifier of the logical block into a physical address of a physical block stored on the memory device, wherein the physical address comprises an identifier of a memory device die; identify, based on block family metadata associated with the memory device, a block family associated with the physical block and the page number; determine a threshold voltage offset associated with the block family and the memory device die; compute a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the memory device die; and read, using the modified threshold voltage, data from a physical page identified by the page number within the physical block.
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公开(公告)号：US20210200436A1
公开(公告)日：2021-07-01
申请号：US16730919
申请日：2019-12-30
Applicant: Micron Technology, Inc.
Inventor： Mark Ish , Yiran Liu , Tom V. Geukens
IPC: G06F3/06 , G06F12/1009 , G06F11/10
Abstract: Methods, systems, and devices for metadata indication are described herein. A method includes receiving, from a host system, a read command to retrieve information from a first block of a memory device, identifying a transfer unit associated with the first block indicated in the read command, identifying an indicator in metadata of the identified transfer unit indicating that at least one sector of the transfer unit has been altered based at least in part on identifying the transfer unit, validating data of the transfer unit stored in the memory device based at least in part on identifying the indicator in the metadata, and retrieving the information stored in the first block based at least in part on validating the data of the transfer unit.
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