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公开(公告)号:US11756626B2
公开(公告)日:2023-09-12
申请号:US17520398
申请日:2021-11-05
Applicant: Micron Technology, Inc.
Inventor: Jiangang Wu , James P. Crowley , Yun Li
CPC classification number: G11C16/14 , G06F9/5016 , G06F12/0246 , G11C16/26 , G06F2209/503 , G06F2209/508
Abstract: Methods, systems, and devices for memory die resource management are described. A resource manager can determine, from a set of global resources for multiple memory dies of a memory sub-system, a set of die-specific resources for a memory die of the multiple memory dies of the memory sub-system. In some case, the set of die-specific resources can be allocated for read commands for the memory die. The resource manager can assign a read command to a die-specific resource of the set of die-specific resources based on the die-specific resource being available and refrain from assigning the read command to the die-specific resource based on the die-specific resource being unavailable.
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公开(公告)号:US11709732B2
公开(公告)日:2023-07-25
申请号:US17831109
申请日:2022-06-02
Applicant: Micron Technology, Inc.
Inventor: Gerald L. Cadloni , Mark Ish , James P. Crowley
IPC: G11C29/00 , G06F11/10 , G06F11/07 , G06F12/02 , G06F12/0882 , G06F12/1081 , G06F11/30
CPC classification number: G06F11/1068 , G06F11/076 , G06F11/0772 , G06F11/3037 , G06F12/0246 , G06F12/0882 , G06F12/1081 , G06F2212/7201
Abstract: A die read counter and a block read counter are maintained for a specified block of a memory device. An estimated number of read events associated with the specified block is determined based on a value of the block read counter and a value of the die read counter. Responsive to determining that the estimated number of read events satisfies a criterion, a media management operation of one or more pages associated with the specified block is performed.
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公开(公告)号:US20220404979A1
公开(公告)日:2022-12-22
申请号:US16954156
申请日:2020-03-10
Applicant: Micron Technology, Inc.
Inventor: Jiangang Wu , Jing Sang Liu , Yun Li , James P. Crowley
IPC: G06F3/06
Abstract: Methods, systems, and devices for managing queues of a memory sub-system are described. A first command can be assigned to a first queue of a memory die of a memory sub-system. The first queue can be is associated with a first priority level and the memory die can include a second queue associated with a second priority level different from the first priority level. The second queue can include a second command, where the first command and the second command are each associated with a respective operation to be performed on the memory sub-system. In some examples, the first command can be issued before the second command based on the first and second priority levels.
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公开(公告)号:US20220059169A1
公开(公告)日:2022-02-24
申请号:US17520398
申请日:2021-11-05
Applicant: Micron Technology, Inc.
Inventor: Jiangang Wu , James P. Crowley , Yun Li
Abstract: Methods, systems, and devices for memory die resource management are described. A resource manager can determine, from a set of global resources for multiple memory dies of a memory sub-system, a set of die-specific resources for a memory die of the multiple memory dies of the memory sub-system. In some case, the set of die-specific resources can be allocated for read commands for the memory die. The resource manager can assign a read command to a die-specific resource of the set of die-specific resources based on the die-specific resource being available and refrain from assigning the read command to the die-specific resource based on the die-specific resource being unavailable.
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公开(公告)号:US20210200453A1
公开(公告)日:2021-07-01
申请号:US16731936
申请日:2019-12-31
Applicant: Micron Technology, Inc.
Inventor: Yun Li , James P. Crowley , Jiangang Wu , Peng Xu
IPC: G06F3/06
Abstract: Methods, systems, and devices for performance control for a memory sub-system are described. A memory sub-system can monitor a backend for writing data to a memory device. The memory sub-system can determine that the bandwidth of the backend satisfies one or more performance criteria that are based on performance between the memory sub-system and a host system. In some embodiments, the memory sub-system can allocate a quantity of slots of a buffer to a frontend of the memory sub-system based on determining that the bandwidth of the backend satisfies the one or more performance criteria. Slots of the buffer can be configured to receive data from the frontend for writing to the memory device by the backend.
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公开(公告)号:US11520502B2
公开(公告)日:2022-12-06
申请号:US16731936
申请日:2019-12-31
Applicant: Micron Technology, Inc.
Inventor: Yun Li , James P. Crowley , Jiangang Wu , Peng Xu
IPC: G06F3/06
Abstract: Methods, systems, and devices for performance control for a memory sub-system are described. A memory sub-system can monitor a backend for writing data to a memory device. The memory sub-system can determine that the bandwidth of the backend satisfies one or more performance criteria that are based on performance between the memory sub-system and a host system. In some embodiments, the memory sub-system can allocate a quantity of slots of a buffer to a frontend of the memory sub-system based on determining that the bandwidth of the backend satisfies the one or more performance criteria. Slots of the buffer can be configured to receive data from the frontend for writing to the memory device by the backend.
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公开(公告)号:US20220237078A1
公开(公告)日:2022-07-28
申请号:US17160194
申请日:2021-01-27
Applicant: Micron Technology, Inc.
Inventor: Gerald L. Cadloni , Mark Ish , James P. Crowley
IPC: G06F11/10 , G06F11/07 , G06F11/30 , G06F12/02 , G06F12/0882 , G06F12/1081
Abstract: A total read counter, a plurality of die read counters, and a plurality of block read counters are maintained. Each die read counter is associated with a respective die of a memory device. A value of a block read counter and a value of a die read counter are determined for a specified block. Based on the value of the block read counter, the value of the die read counter, and the value of the total read counter, an estimated number of read events associated with the specified block of the memory device is determined. Responsive to determining that the estimated number of read events satisfies a predefined criterion, a media management operation of one or more pages associated with the specified block is performed.
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公开(公告)号:US20210303340A1
公开(公告)日:2021-09-30
申请号:US16828738
申请日:2020-03-24
Applicant: Micron Technology, Inc.
Inventor: Yun Li , Jiangang Wu , James P. Crowley
Abstract: Methods, systems, and devices for a read counter for quality of service design are described. First commands may be assigned to a first queue of a memory die of a memory sub-system, wherein the first queue is associated with a first priority level. The memory die may include a second queue associated with a second priority level different from the first priority level, the second queue comprising one or more second commands assigned. Based at least in part on a counter associated with the first queue and the first and second priority levels, it may be determined that a threshold number of the first commands of the first queue have issued without a command from the one or more second commands having issued. A command from the second commands may issue before issuing a next command of the first commands based at least in part on the counter.
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公开(公告)号:US20200174935A1
公开(公告)日:2020-06-04
申请号:US16208499
申请日:2018-12-03
Applicant: Micron Technology, Inc.
Inventor: James P. Crowley , Yuriy Pavlenko , Karl D. Schuh
IPC: G06F12/0871 , G06F12/0891 , G06F11/20 , G06F11/07 , G06F9/50
Abstract: A controller selects a redundancy context for eviction in response to a request for a redundancy context. The redundancy context includes buffer data and an identifier. The redundancy context is evicted by instructing a redundancy component to send the buffer data and identifier to a memory component to store in a buffer as an evicted context. The controller instructs the memory component to provide the evicted context for storage in a controller buffer. A new redundancy context is allocated to the requester following the eviction.
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公开(公告)号:US20240192866A1
公开(公告)日:2024-06-13
申请号:US18415459
申请日:2024-01-17
Applicant: Micron Technology, Inc.
Inventor: Yun Li , James P. Crowley , Jiangang Wu , Peng XU
IPC: G06F3/06
CPC classification number: G06F3/0631 , G06F3/061 , G06F3/0653 , G06F3/0656 , G06F3/0659 , G06F3/0673
Abstract: Methods, systems, and devices for performance control for a memory sub-system are described. A memory sub-system can monitor a backend for writing data to a memory device. The memory sub-system can determine that the bandwidth of the backend satisfies one or more performance criteria that are based on performance between the memory sub-system and a host system. In some embodiments, the memory sub-system can allocate a quantity of slots of a buffer to a frontend of the memory sub-system based on determining that the bandwidth of the backend satisfies the one or more performance criteria. Slots of the buffer can be configured to receive data from the frontend for writing to the memory device by the backend.
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