公开(公告)号：US10424354B2

公开(公告)日：2019-09-24

申请号：US16380285

申请日：2019-04-10

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Taihei Shido

IPC: G11C7/22 ,  G11C7/10 ,  G06F13/16

Abstract: Apparatuses and methods including an interface die that interfaces with dice through memory channels are described. An example apparatus includes a first die. The first die receives a first command including first command information and second command information provided after the first command information. The first die changes an order of providing the first command information and the second command information and provides a second command to a second die, the second command including the second command information and the first command information provided after the second command information in the changed order. The first command information is related to a command function and the second command information is related to a destination of the command function.

公开(公告)号：US20190122708A1

公开(公告)日：2019-04-25

申请号：US16225303

申请日：2018-12-19

Applicant: Micron Technology, Inc.

Inventor： Chikara Kondo ,  Tomoyuki Shibata ,  Chiaki Dono ,  Seiji Narui ,  Minehiko Uehara ,  Taihei Shido ,  Homare Sato

IPC: G11C7/10 ,  G11C7/22 ,  G11C19/28

Abstract: Apparatuses and methods for transmitting data between a plurality of chips are described. An example apparatus includes: a first chip, wherein the first chip includes a receiver that receives a data strobe signal and further generates an internal strobe signal responsive, at least in part, to the data strobe signal, the internal strobe signal including a first edge and a second edge following the first edge; a buffer circuit coupled to a set of input terminals and captures first data at the set of input terminals responsive, at least in part, to the first edge of the internal strobe signal and further captures second data at the set of input terminals responsive, at least in part, to the second edge of the internal strobe signal; a driver coupled between the buffer circuit and a set of data terminals and configured to be activated to provide the first and second data from the buffer circuit to the set of data terminals responsive, at least in part, to a control signal; and a width expanding circuit that provides the control signal responsive, at least in part, to the internal strobe signal.

公开(公告)号：US10255963B2

公开(公告)日：2019-04-09

申请号：US15979057

申请日：2018-05-14

Applicant: Micron Technology, Inc.

Inventor： Taihei Shido

IPC: G11C7/00 ,  G11C11/406 ,  G11C11/4076 ,  G11C7/22 ,  G11C11/4093 ,  G11C11/408

Abstract: Some embodiments include an apparatus that comprise an interface chip having an oscillator to produce an original clock signal, a first memory chip having first memory cells, and a second memory chip having second memory cells. The first memory cells may be refreshed in response to a first clock signal based on the original clock signal. The second memory cells may be refreshed in response to a second clock signal based on the original clock signal.

公开(公告)号：US20180301202A1

公开(公告)日：2018-10-18

申请号：US16013290

申请日：2018-06-20

Applicant: Micron Technology, Inc.

Inventor： Chiaki Dono ,  Taihei Shido ,  Yuki Ebihara

IPC: G11C29/38 ,  G11C29/00 ,  G11C29/48 ,  G11C29/44 ,  G11C29/36 ,  G11C29/12

Abstract: Apparatuses and methods for an interface chip that interfaces with chips are described. An example apparatus includes: first terminals; circuit groups, each of the circuit groups including circuit blocks being configured to electrically couple to the first terminals; a control circuit that selects one of the circuit groups and electrically couple the first terminals to the circuit blocks of the one of the circuit groups; terminal groups, each of the terminal groups including second terminals, each of the terminal groups being provided correspondingly to each of the circuit groups, the second terminals of each of the terminal groups being smaller in number than the circuit blocks of a corresponding one of the circuit groups; and a remapping circuit that couples the second terminals of each of the terminal groups to selected ones of the circuit blocks of the corresponding one of the circuit groups.

公开(公告)号：US10008287B2

公开(公告)日：2018-06-26

申请号：US15217719

申请日：2016-07-22

Applicant: Micron Technology, Inc.

Inventor： Chiaki Dono ,  Taihei Shido ,  Yuki Ebihara

IPC: G11C29/00 ,  G11C29/38 ,  G11C29/36 ,  G11C29/44

Abstract: Apparatuses and methods for an interface chip are described. An example apparatus includes a first chip. The first chip includes, on a single semiconductor substrate, first terminals, circuit groups, and terminal groups corresponding to the circuit groups, each of the circuit groups including circuit blocks. A control circuit in the first chip selects one of the circuit groups and electrically couples the first terminals to the circuit blocks of the selected circuit group. Second terminals are included in each of the terminal groups. A number of all of the second terminals in each of the terminal groups is smaller than a number of all of the circuit blocks in the corresponding circuit group. The first chip further includes, for example, a remapping circuit.