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公开(公告)号:US20200154368A1
公开(公告)日:2020-05-14
申请号:US16744852
申请日:2020-01-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Satoshi TANAKA , Kiichiro TAKENAKA , Takayuki TSUTSUI , Taizo YAMAWAKI , Shun IMAI
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号:US20190253086A1
公开(公告)日:2019-08-15
申请号:US16274391
申请日:2019-02-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Tsuyoshi SATO , Hidetoshi MATSUMOTO , Kiichiro TAKENAKA , Masahiro ITO , Satoshi TANAKA
Abstract: A high-frequency-signal transceiver circuit transmits and receives a signal between first to sixth antenna terminals and terminals near a high-frequency circuit. The high-frequency-signal transceiver circuit includes first to sixth circuits connected to the corresponding first to sixth antenna terminals. One of the first to sixth circuits transmits and receives only a signal of time division multiplexing communication.
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公开(公告)号:US20240405723A1
公开(公告)日:2024-12-05
申请号:US18800331
申请日:2024-08-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuuma NOGUCHI , Kiichiro TAKENAKA , Takeshi KOGURE
Abstract: An amplification system configured to perform SPT and includes a DC/DC converter configured to output a power supply voltage Vcc1, a DC/DC converter configured to output a power supply voltage Vcc2, power amplifiers, and a switch configured to, in a first mode, selectively perform switching between a connection of the DC/DC converter and the power amplifier and a connection of the DC/DC converter and the power amplifier and, in a second mode, connect the DC/DC converter and the power amplifier and connect the DC/DC converter and the power amplifier.
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公开(公告)号:US20230276372A1
公开(公告)日:2023-08-31
申请号:US18142469
申请日:2023-05-02
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Satoshi TANAKA , Kiichiro TAKENAKA , Takayuki TSUTSUI , Taizo YAMAWAKI , Shun IMAI
CPC classification number: H04W52/246 , H03F1/0227 , H03F1/0277 , H04W52/0251 , H03F3/19 , H03F3/189 , H03F3/24 , H03F3/21 , H04W52/0261 , H03F1/0216 , H04B1/0475 , Y02D30/70 , H03F2200/102 , H03F2200/504 , H03F2200/294 , H04W88/06
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号:US20230199671A1
公开(公告)日:2023-06-22
申请号:US18171881
申请日:2023-02-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Satoshi TANAKA , Kiichiro TAKENAKA , Takayuki TSUTSUI , Taizo YAMAWAKI , Shun IMAI
CPC classification number: H04W52/246 , H04W52/0261 , H03F3/189 , H03F3/24 , H04B1/0475 , H03F1/0227 , H03F1/0277 , H04W52/0251 , H03F3/19 , H03F1/0216 , H03F3/21 , Y02D30/70 , H04W88/06
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号:US20210305950A1
公开(公告)日:2021-09-30
申请号:US17209796
申请日:2021-03-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kiichiro TAKENAKA , Masahiro ITO , Yuuma NOGUCHI , Daiji NAGASHIMA , Hidetoshi MATSUMOTO
IPC: H03F3/24
Abstract: A radio frequency signal having a constant amplitude is modulated by a digital modulation signal and a radio frequency input signal whose amplitude changes stepwise is generated. The radio frequency input signal is input into a power amplifier that is an evaluation target. A period in which an amplitude of the radio frequency input signal is constant is defined as a measurement period and an output signal of the power amplifier is measured in each of measurement periods in which amplitudes of the radio frequency input signal are different from each other.
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公开(公告)号:US20210135657A1
公开(公告)日:2021-05-06
申请号:US17089766
申请日:2020-11-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Takayuki TSUTSUI , Satoshi TANAKA , Kiichiro TAKENAKA , Masatoshi HASE
Abstract: An active balun circuit includes first and second transistors having emitters electrically coupled to each other and configured to output differential signals and a circuit element coupled between the connection point of the emitter of the first transistor and the emitter of the second transistor and a reference potential. The impedance of the circuit element at a particular frequency of the input signal appears significantly larger than impedances at other frequencies. An input signal from an input terminal is inputted to the base of the first transistor. The reference potential is applied to the base of the second transistor. A supply voltage is applied to the collector of the first transistor and the collector of the second transistor. A signal from the collector of the first transistor and a signal from the collector of the second transistor are outputted as the differential signals.
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公开(公告)号:US20190181892A1
公开(公告)日:2019-06-13
申请号:US16211940
申请日:2018-12-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kiichiro TAKENAKA
Abstract: A transmission unit includes: a power amplification module that amplifies the power of an input signal and outputs an amplified signal; and a power supply module that supplies a power supply voltage to the power amplification module on the basis of a first control signal corresponding to the band width of the input signal. On the basis of the first control signal, the power supply module varies the power supply voltage in accordance with the amplitude level of the input signal in the case where the band width of the input signal is a first band width and varies the power supply voltage in accordance with the average output power of the power amplification module in the case where the band width of the input signal is a second band width that is larger than the first band width.
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公开(公告)号:US20190150100A1
公开(公告)日:2019-05-16
申请号:US16243634
申请日:2019-01-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Satoshi TANAKA , Kiichiro TAKENAKA , Takayuki TSUTSUI , Taizo YAMAWAKI , Shun IMAI
CPC classification number: H04W52/246 , H03F1/0216 , H03F1/0227 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/21 , H03F3/24 , H03F2200/102 , H03F2200/294 , H03F2200/504 , H04B1/0475 , H04W52/0251 , H04W52/0261 , H04W88/06 , Y02D70/00 , Y02D70/1246 , Y02D70/1262 , Y02D70/40
Abstract: A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
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公开(公告)号:US20180145637A1
公开(公告)日:2018-05-24
申请号:US15817524
申请日:2017-11-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kiichiro TAKENAKA
CPC classification number: H03F1/0288 , H03F1/56 , H03F1/565 , H03F3/19 , H03F3/21 , H03F3/245 , H03F2200/222 , H03F2200/225 , H03F2200/387 , H03F2200/391 , H03F2200/451
Abstract: A power amplifier includes a distributor distributing an input first signal to a second signal and a third signal delayed by about 2ϕ degrees (45
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