公开(公告)号：US07637658B2

公开(公告)日：2009-12-29

申请号：US11738571

申请日：2007-04-23

申请人： Marco A. Gardner ,  Jerry L. Doorenbos

发明人： Marco A. Gardner ,  Jerry L. Doorenbos

IPC分类号： G01K7/00

CPC分类号： G01K7/01 ,  H03M1/1245

摘要： Various systems and methods for pulse width modulated clocking in a temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement systems with a variable current source, a transistor, and a pulse width modulation circuit. The variable current source is operable to provide a first current and a second current that are applied to the transistor. A first base-emitter voltage occurs on the transistor when the first current is applied, and a second base-emitter voltage occurs on the transistor when the second current is applied. The first base emitter voltage is associated with a first sample period, and a second base-emitter voltage is associated with a second sample period. The pulse width modulation circuit provides a pulse width modulated clock including a combination of the aforementioned first period and second period.

摘要翻译： 公开了用于温度测量中的脉宽调制时钟的各种系统和方法。 例如，本发明的一些实施例提供具有可变电流源，晶体管和脉宽调制电路的温度测量系统。 可变电流源可操作以提供施加到晶体管的第一电流和第二电流。 当施加第一电流时，在晶体管上发生第一基极 - 发射极电压，并且当施加第二电流时，晶体管上出现第二基极 - 发射极电压。 第一基极发射极电压与第一采样周期相关联，并且第二基极 - 发射极电压与第二采样周期相关联。 脉冲宽度调制电路提供包括上述第一周期和第二周期的组合的脉宽调制时钟。

公开(公告)号：US07554517B2

公开(公告)日：2009-06-30

申请号：US11079357

申请日：2005-03-14

申请人： David R. Baum ,  Frank Haupt ,  Jerry L. Doorenbos

发明人： David R. Baum ,  Frank Haupt ,  Jerry L. Doorenbos

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G3/3648 ,  G09G2320/0276 ,  G09G2320/04

摘要： A gamma reference voltage generator (10B) for an LCD display includes a control interface logic circuit (48) having an output bus coupled to inputs of a first register (46) having outputs coupled to inputs of a second register (42) the outputs of which are coupled to corresponding inputs of plurality of DACs (28). The control interface logic circuit receives gray scale codes representative of gamma reference voltages and transfers the codes via the output bus into the first register and controls further transfer of the codes to inputs of the DACs to instantaneously or rapidly update gamma correction voltages applied to the LCD display.

摘要翻译： 用于LCD显示器的伽马参考电压发生器（10B）包括控制接口逻辑电路（48），其具有耦合到具有耦合到第二寄存器（42）的输入的输出的第一寄存器（46）的输入的输出总线， 其耦合到多个DAC（28）的相应输入端。 控制接口逻辑电路接收代表伽马参考电压的灰度代码，并将代码经由输出总线传送到第一寄存器中，并控制进一步传输代码到DAC的输入端以瞬时或快速更新施加到LCD的伽马校正电压 显示。

公开(公告)号：US06844775B2

公开(公告)日：2005-01-18

申请号：US10431793

申请日：2003-05-07

申请人： Jerry L. Doorenbos ,  David M. Jones ,  Mikhail V. Ivanov

发明人： Jerry L. Doorenbos ,  David M. Jones ,  Mikhail V. Ivanov

IPC分类号： H03F3/45 ,  H03F1/02

CPC分类号： H03F3/45986 ,  H03F2200/261 ,  H03F2203/45101

摘要： An operational amplifier having an adjustable input offset is provided that can improve dynamic performance by allowing processing of the input signal in continuous-time. The amplifier circuit comprises an input source and an operational amplifier configured with an adjustable input offset circuit. The adjustable input offset circuit enables cancellation of the offset error from any input sources prior to being translated or gained up by the operational amplifier, thus improving the dynamic range of the operational amplifier. The adjustable input offset circuit can be configured within a signal path of an auto-zero loop of the operational amplifier, or with a continuous-time implementation.

摘要翻译： 提供了具有可调输入偏移的运算放大器，其可以通过允许连续地处理输入信号来改善动态性能。 放大器电路包括输入源和配置有可调输入偏移电路的运算放大器。 可调输入偏移电路能够在由运算放大器转换或增益之前消除任何输入源的偏移误差，从而改善运算放大器的动态范围。 可调输入偏移电路可以配置在运算放大器的自动调零回路的信号路径中，或者连续执行。

公开(公告)号：US06255807B1

公开(公告)日：2001-07-03

申请号：US09691638

申请日：2000-10-18

申请人： Jerry L. Doorenbos ,  David M. Jones

发明人： Jerry L. Doorenbos ,  David M. Jones

IPC分类号： G05F316

CPC分类号： G05F3/30 ,  Y10S323/907

摘要： A temperature curvature compensation technique and circuit can be realized through the generation of a temperature curvature compensation voltage provided by measuring the difference between the base-emitter voltage Vbe of two different transistors operating at two different temperature coefficient quiescent currents. This voltage difference measured between two such transistors results in a scaled voltage that is representative of the temperature curvature of the base-emitter voltage Vbe of a transistor, and which can then be summed to the bandgap reference output to provide a temperature compensated, bandgap reference voltage. The above method can be carried out in an amplifier circuit configured to receive and sum the temperature curvature compensation voltage and the bandgap reference output voltage into the temperature compensated, bandgap reference voltage. In addition, the summing of the temperature curvature compensation voltage and the bandgap reference output voltage may be realized through the application of a dual differential pair amplifier configuration which operates as a gm source. Further, scaling of the respective input voltages for each differential pair can be provided by the amplifier circuit. Moreover, the dual differential pair amplifier may be incorporated into a buffer amplifier configuration to receive a bandgap reference voltage and provide a buffered output or, integrated with a bandgap reference circuit directly into an amplifier circuit.

摘要翻译： 温度曲率补偿技术和电路可以通过产生通过测量以两种不同温度系数静态电流工作的两个不同晶体管的基极 - 发射极间电压Vbe之间的差提供的温度曲率补偿电压来实现。 在两个这样的晶体管之间测量的这个电压差导致代表晶体管的基极 - 发射极电压Vbe的温度曲率的缩放电压，然后可以将其相加到带隙基准输出以提供温度补偿的带隙基准 电压。 上述方法可以在放大器电路中进行，该放大器电路被配置为将温度曲率补偿电压和带隙参考输出电压接收并加到温度补偿带隙参考电压中。 此外，温度曲率补偿电压和带隙参考输出电压的相加可以通过应用作为gm源工作的双差分对放大器配置来实现。 此外，放大电路可以提供每个差分对的各个输入电压的缩放。 此外，双差分对放大器可以并入缓冲放大器配置中以接收带隙参考电压并提供缓冲输出，或者与带隙参考电路集成到放大器电路中。

公开(公告)号：US6060874A

公开(公告)日：2000-05-09

申请号：US359251

申请日：1999-07-22

申请人： Jerry L. Doorenbos

发明人： Jerry L. Doorenbos

IPC分类号： G05F3/30 ,  G05F3/16

CPC分类号： G05F3/30 ,  Y10S323/907

摘要： Curvature in a reference voltage produced by a switched capacitor band gap reference circuit is compensated by producing a first .DELTA.V.sub.BE voltage by causing first and second PTAT/R currents to flow through a first .DELTA.V.sub.BE -generating circuit. The first .DELTA.V.sub.BE voltage is applied to a first terminal of a first capacitor having a second terminal coupled to a summing conductor of an operational amplifier producing the reference voltage. A second .DELTA.V.sub.BE voltage is produced by causing a third PTAT/R current and a fourth current to flow through a second .DELTA.V.sub.BE -generating circuit. The second .DELTA.V.sub.BE voltage is applied to a first terminal or a second capacitor having a second terminal coupled to the summing conductor. First and second charges are transferred from the first and second capacitors through the summing conductor into a feedback capacitor coupled between the summing conductor and an output of the operational amplifier to produce the compensated reference voltage on the output of the operational amplifier. A technique of storing a voltage on the feedback capacitor equal to a V.sub.BE voltage minus a voltage on the summing conductor during a charging phase, and then connecting the feedback capacitor between the summing conductor and the output of the operational amplifier cancels the offset voltage of the amplifier.

摘要翻译： 通过使第一和第二PTAT / R电流流过第一DELTA VBE生成电路来产生第一DELTA VBE电压来补偿由开关电容器带隙基准电路产生的参考电压中的曲率。 第一DELTA VBE电压被施加到具有耦合到产生参考电压的运算放大器的求和导体的第二端子的第一电容器的第一端子。 通过使第三PTAT / R电流和第四电流流过第二DELTA VBE发生电路来产生第二DELTA VBE电压。 第二DELTA VBE电压被施加到具有耦合到求和导体的第二端子的第一端子或第二电容器。 第一和第二电荷从第一和第二电容器通过求和导体转移到耦合在求和导体和运算放大器的输出之间的反馈电容器，以在运算放大器的输出端产生补偿参考电压。 将在反馈电容器上的电压等于VBE电压减去在充电阶段期间的求和导体上的电压，然后在求和导体和运算放大器的输出端之间连接反馈电容器的技术抵消了 放大器

公开(公告)号：US20120025890A1

公开(公告)日：2012-02-02

申请号：US12804658

申请日：2010-07-27

申请人： Jerry L. Doorenbos ,  Sudarshan Udayashankar

发明人： Jerry L. Doorenbos ,  Sudarshan Udayashankar

IPC分类号： H03K5/08

CPC分类号： H03K5/08

摘要： A differential input circuit (1-1) includes first (Q0) and second (Q1) input transistors having control electrodes coupled to first (Vin+) and second (Vin−) input signals, respectively. A pass transistor (P3) is coupled between first electrodes of the first and second input transistors. First (N1) and second (N2) level shift transistors have control electrodes coupled to the first and second input signals, respectively. A voltage selector circuit (22) selects a voltage on a first electrode of one of the first and second level shift transistors according to which is at a higher voltage, and produces a corresponding control voltage (V19) on a control electrode of the pass transistor so as to limit a voltage difference between the first electrode and the control electrode of the first input transistor (Q0) when it is turned off in response to a large difference between the first and second input signals.

摘要翻译： 差分输入电路（1-1）包括分别与第一（Vin +）和第二（Vin-）输入信号耦合的控制电极的第一（Q0）和第二（Q1）输入晶体管。 传输晶体管（P3）耦合在第一和第二输入晶体管的第一电极之间。 第一（N1）和第二（N2）电平移位晶体管分别具有耦合到第一和第二输入信号的控制电极。 电压选择器电路22选择第一和第二电平移位晶体管中的一个的第一电极上的电压，该电压处于较高电压，并且在传输晶体管的控制电极上产生相应的控制电压（V19） 以便响应于第一和第二输入信号之间的大的差异来限制第一输入晶体管（Q0）的第一电极和控制电极关断时的电压差。

公开(公告)号：US20110260708A1

公开(公告)日：2011-10-27

申请号：US12799288

申请日：2010-04-21

申请人： Dimitar T. Trifonov ,  Jerry L. Doorenbos

发明人： Dimitar T. Trifonov ,  Jerry L. Doorenbos

IPC分类号： G05F3/16

CPC分类号： G05F3/30 ,  H03F1/303 ,  H03F2200/447

摘要： A circuit for generating a band gap reference voltage (VREF) includes circuitry (I3×7) for supplying a first current to a first conductor (NODE1) and a second current to a second conductor (NODE2). The first conductor is successively coupled to a plurality of diodes (Q0×16), respectively, in response to a digital signal (CTL-VBE) to cause the first current to successively flow into selected diodes. The second conductor is coupled to collectors of the diodes which are not presently coupled to the first conductor. The diodes are successively coupled to the first conductor so that the first current causes the diodes, respectively, to produce relatively large VBE voltages on the first conductor and the second current causes sets of the diodes not coupled to the first conductor to produce relatively small VBE voltages on the second conductor. The relatively large and small VBE voltages provide differential band gap charges (QCA-QCB) which are averaged to provide a stable band gap reference voltage (VREF).

摘要翻译： 用于产生带隙参考电压（VREF）的电路包括用于向第一导体（NODE1）提供第一电流的电路（I3×7）和向第二导体（NODE2）提供第二电流的电路。 第一导体响应于数字信号（CTL-VBE）分别依次耦合到多个二极管（Q0×16），以使第一电流连续地流入选定的二极管。 第二导体耦合到当前不耦合到第一导体的二极管的集电极。 二极管连续地耦合到第一导体，使得第一电流分别导致二极管在第一导体上产生相对较大的VBE电压，并且第二电流使得未耦合到第一导体的二极管组产生相对较小的VBE 第二导体上的电压。 相对较大和较小的VBE电压提供差分带隙电荷（QCA-QCB），其被平均以提供稳定的带隙参考电压（VREF）。

公开(公告)号：US07944287B2

公开(公告)日：2011-05-17

申请号：US12229278

申请日：2008-08-21

申请人： Tony R. Larson ,  Dimitar T. Trifonov ,  Jerry L. Doorenbos

发明人： Tony R. Larson ,  Dimitar T. Trifonov ,  Jerry L. Doorenbos

IPC分类号： H03F1/02

CPC分类号： H03F3/45475 ,  H03F3/45183 ,  H03F3/45197 ,  H03F3/45928 ,  H03F3/72 ,  H03F2203/45101 ,  H03F2203/45482 ,  H03F2203/45494 ,  H03F2203/45616 ,  H03F2203/45678 ,  H03F2203/45681

摘要： A programmable offset amplifier includes first (M1) and second (M2) input transistors having differentially connected sources and gates coupled to first (Vin+) and second (Vin−) input voltages. A tail current (Itail1) is shared between the first and second input transistors. First (M3) and second (M4) load devices are coupled between a reference voltage and drains of the first and second input transistors, respectively. An output stage (13) has a first input (+) coupled to the drain of the second input transistor and a second input (−) coupled to the drain of the first input transistor. Programmable voltage changes are produced on input elements of programmable input offset circuitry to cause changes in offset voltages associated with electrodes of the input transistors which are reflected back to the amplifier input to provide a large programmable input-referred offset voltage.

摘要翻译： 可编程偏移放大器包括具有与第一（Vin +）和第二（Vin-）输入电压耦合的差分连接的源极和第一（M1）和第二（M2）输入晶体管。 尾电流（Itail1）在第一和第二输入晶体管之间共享。 第一（M3）和第二（M4）负载装置分别耦合在参考电压和第一和第二输入晶体管的漏极之间。 输出级（13）具有耦合到第二输入晶体管的漏极的第一输入（+）和耦合到第一输入晶体管的漏极的第二输入（ - ）。 可编程电压变化在可编程输入偏移电路的输入元件上产生，以引起与输入晶体管的电极相关联的偏移电压的变化，其被反射回到放大器输入端以提供大的可编程输入参考偏移电压。

公开(公告)号：US07605646B2

公开(公告)日：2009-10-20

申请号：US11890204

申请日：2007-08-03

申请人： Dimitar T. Trifonov ,  Tony R. Larson ,  Jerry L. Doorenbos

发明人： Dimitar T. Trifonov ,  Tony R. Larson ,  Jerry L. Doorenbos

IPC分类号： H03F1/02

CPC分类号： H03F3/45968 ,  H03F3/387 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2203/45138 ,  H03F2203/45212

摘要： An instrumentation amplifier includes first (11A) and second (12A) input amplifiers having outputs (15A,B) coupled to an output amplifier (13). A first auto-zero stage (20) in the first input amplifier is auto-zeroed to a first voltage level (VREFL), a first input signal (Vin+) is amplified by a second auto-zero stage (24) in the first input amplifier, and the amplified first input signal is coupled to the output amplifier, during a first phase (A). A third auto-zero stage (44) in the second input amplifier is auto-zeroed to a second voltage level (VREFH), a second input signal (Vin−) is amplified by a fourth auto-zero stage (40) in the second input amplifier, and the amplified second input signal is coupled to the output amplifier, during a second phase (B). The second auto-zero stage is auto-zeroed to the first voltage level, the first input signal is amplified by the first auto-zero stage (20), and the amplified first input signal is coupled to the output amplifier, during a third phase (C). The fourth auto-zero stage is auto-zeroed to a the second voltage level, the second input signal is amplified by the third auto-zero stage, and the amplified second input signal is coupled to the output amplifier, during a fourth phase (D).

摘要翻译： 仪表放大器包括具有耦合到输出放大器（13）的输出（15A，B）的第一（11A）和第二（12A）输入放大器。 第一输入放大器中的第一自动归零级（20）被自动归零到第一电压电平（VREFL），第一输入信号（Vin +）被第一输入端的第二自动调零级（24）放大 放大器，并且放大的第一输入信号在第一阶段（A）期间耦合到输出放大器。 第二输入放大器中的第三自动调零级（44）自动归零至第二电压电平（VREFH），第二输入信号（Vin-）由第二自动调零级（40）放大，第二自动调零级 输入放大器，并且放大的第二输入信号在第二阶段（B）期间被耦合到输出放大器。 第二自动归零级自动归零到第一电压电平，第一输入信号由第一自动调零级（20）放大，放大的第一输入信号在第三阶段耦合到输出放大器 （C）。 第四自动调零级自动归零至第二电压电平，第二输入信号由第三自动调零级放大，放大后的第二输入信号在第四阶段（D ）。

公开(公告)号：US07524109B2

公开(公告)日：2009-04-28

申请号：US11738584

申请日：2007-04-23

申请人： Marco A. Gardner ,  Jerry L. Doorenbos

发明人： Marco A. Gardner ,  Jerry L. Doorenbos

IPC分类号： G01K7/00

CPC分类号： G01K7/01 ,  G01K15/00

摘要： Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide methods for temperature measurement that include exciting a provided transistor with at least four sequential input signals of different magnitudes. In response, the transistor exhibits a sequence of output signals corresponding to the four sequential input signals. The sequence of output signals is sensed using a different gain for each of the output signals included in the sequence of output signals, and the output signals included in the sequence of output signals are combined such that the combined output signals eliminates a resistance error. The combined output signals are then used to calculate a temperature of the transistor.

摘要翻译： 公开了用于温度测量的各种系统和方法。 例如，本发明的一些实施例提供了用于温度测量的方法，其包括用至少四个具有不同幅度的顺序输入信号激励所提供的晶体管。 作为响应，晶体管表现出对应于四个顺序输入信号的输出信号序列。 输出信号的序列使用包括在输出信号序列中的每个输出信号的不同的增益来检测，并且包括在输出信号序列中的输出信号被组合，使得组合的输出信号消除了电阻误差。 然后，组合的输出信号用于计算晶体管的温度。