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公开(公告)号：US07882484B1
公开(公告)日：2011-02-01
申请号：US12053407
申请日：2008-03-21
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F2217/40
摘要： A method of creating a design-specific I/O model document can include reading a plurality of I/O pin models corresponding to available I/O pin profiles on a target device (355) and identifying I/O pins of the target device that are used by a circuit design (325). An I/O pin profile for each I/O pin of the target device that is used by the circuit design can be determined (345). An I/O pin model can be selected from the plurality of I/O pin models for each I/O pin of the target device that is used by the circuit design according to the I/O pin profiles (355). The design-specific I/O model document for the circuit design can be generated by including each selected I/O pin model within the design-specific I/O model document (365). The design-specific I/O model document can be output (380).
摘要翻译： 创建特定于设计的I / O模型文档的方法可以包括读取与目标设备（355）上的可用I / O引脚配置对应的多个I / O引脚模型，并且识别目标器件的I / O引脚， 被电路设计使用（325）。 可以确定电路设计使用的目标器件的每个I / O引脚的I / O引脚配置文件（345）。 可以根据I / O引脚配置文件（355）从电路设计使用的目标器件的每个I / O引脚的多个I / O引脚型号中选择I / O引脚型号。 可以通过在设计特定I / O模型文档（365）中包含每个选定的I / O引脚模型来生成电路设计的设计特定I / O模型文档。 可以输出设计特定的I / O模型文档（380）。
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公开(公告)号：US07107258B2
公开(公告)日：2006-09-12
申请号：US10065267
申请日：2002-09-30
申请人： Paul Cheng , Nelson L. Chow , Fangli Chien
发明人： Paul Cheng , Nelson L. Chow , Fangli Chien
IPC分类号： G06F17/30
CPC分类号： G06F17/30982 , Y10S707/99932 , Y10S707/99933 , Y10S707/99934 , Y10S707/99935
摘要： A search engine having a controller, a memory, and at least one hash-CAM (H-CAM). The memory includes a database of search values and associate content or just associate content. The controller uses search values to access the memory to obtain the search results. The H-CAM includes at least one set of paired hash units and CAM units and at least one logic unit. The CAM units hold values known to cause hash collisions in the paired hash units, and the logic unit prioritizes the hash and CAM unit outputs to address values usable to access the memory and obtain a search result at the controller that is not the result of a hash collision. The H-CAM may optionally include a search data storage to store the search values, so that they need not be stored in the memory, and a comparator to determine and handle new search data based hash collisions. The H-CAM may optionally also be cascaded.
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公开(公告)号：US20050263202A1
公开(公告)日：2005-12-01
申请号：US11132844
申请日：2005-05-19
申请人： Paul Cheng
发明人： Paul Cheng
CPC分类号： F02D33/003 , B82Y10/00 , B82Y30/00 , C08J5/041 , C08J5/047 , C08J2377/06 , C08K3/041 , C08K5/0016 , C08K7/04 , C08L51/003 , C08L77/06 , F02M37/00 , Y10T428/1397 , C08L2666/24
摘要： A polymeric fuel system component made from a polyamide composition comprising one or more of polyamide 6,10 and polyamide 6,12 or copolymers thereof; stainless steel fibers and/or carbon nanotubes; an impact modifier; a plasticizer; and, optionally, other additives.
摘要翻译： 由聚酰胺组合物制成的聚合物燃料体系组分，其包含一种或多种聚酰胺6,10和聚酰胺6,12或其共聚物; 不锈钢纤维和/或碳纳米管; 抗冲改性剂 增塑剂; 和任选的其它添加剂。
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公开(公告)号：US06917934B2
公开(公告)日：2005-07-12
申请号：US10065261
申请日：2002-09-30
申请人： Paul Cheng , Nelson L. Chow , Fangli Chien
发明人： Paul Cheng , Nelson L. Chow , Fangli Chien
IPC分类号： G06F17/30
CPC分类号： G06F17/30982 , Y10S707/99932 , Y10S707/99933 , Y10S707/99934 , Y10S707/99935
摘要： A search engine (100) having a controller (112), a memory (114), and a hash pointer unit (110). The memory (114) includes a database of search data and associate content, and the controller (112) uses individual search values to access the memory (114) to obtain individual search results. The controller (112) includes a hash function (116) that generates a hash value from a, typically large, search value into a, typically smaller, hash value that may be a hash collision. The controller (112) converts the hash value into a hash address which is communicated to the hash pointer unit (110), which receives the hash address and provides a hash pointer that is communicated to and used by the memory to look up respective search results. In this manner hash collisions are avoided and the size of the memory (114) is not a function of the degree of multi-way set-associativity used.
摘要翻译： 具有控制器（112），存储器（114）和散列指针单元（110）的搜索引擎（100）。 存储器（114）包括搜索数据和关联内容的数据库，并且控制器（112）使用各个搜索值访问存储器（114）以获得单独的搜索结果。 控制器（112）包括散列函数（116），该散列函数（116）从通常较大的搜索值生成散列值到通常较小的可能是散列冲突的哈希值。 控制器（112）将哈希值转换成散列地址，该哈希地址被传送到散列指针单元（110），该哈希指令单元接收散列地址并提供传送给存储器并由存储器使用以查找相应搜索结果的散列指针 。 以这种方式避免了哈希冲突，并且存储器（114）的大小不是所使用的多路组合关联度的函数。
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公开(公告)号：US06889225B2
公开(公告)日：2005-05-03
申请号：US09927599
申请日：2001-08-09
申请人： Paul Cheng , Nelson L. Chow , Fangli Chien
发明人： Paul Cheng , Nelson L. Chow , Fangli Chien
CPC分类号： G06F17/30982 , Y10S707/99932 , Y10S707/99933 , Y10S707/99934 , Y10S707/99935
摘要： A hash-CAM (H-CAM) which may work with a controller and a memory containing a database of either search values and associate content or associate content by itself The H-CAM includes at least one set of paired hash units and CAM units and at least one logic unit. The CAM units hold values known to cause hash collisions in the respectively paired hash units, and the logic unit prioritizes the hash and CAM unit outputs to a single address value usable to access the memory and obtain a search result at the controller that is not the result of a hash collision. The H-CAM may optionally include a search data storage to store the search values, so that they need not be stored in the memory, and a comparator to determine and handle newly determined hash collisions.
摘要翻译： 可以与控制器和包含搜索值和关联内容或关联内容的数据库的存储器一起工作的散列CAM（H-CAM）.H-CAM包括至少一组配对散列单元和CAM单元， 至少一个逻辑单元。 CAM单元保持已知的在分别对应的哈希单元中引起哈希冲突的值，并且逻辑单元将散列和CAM单元输出优先级到可用于访问存储器的单个地址值，并且在控制器处获得不是 哈希冲突的结果。 H-CAM可以可选地包括搜索数据存储以存储搜索值，使得它们不需要存储在存储器中，以及比较器来确定和处理新确定的哈希冲突。
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公开(公告)号：US06707505B2
公开(公告)日：2004-03-16
申请号：US09276878
申请日：1999-03-26
申请人： Jhi-Chung Kuo , John Francis McNally , Jeff Jang-Fang Suen , Henry Choy , Paul Cheng , Lin Liang
发明人： Jhi-Chung Kuo , John Francis McNally , Jeff Jang-Fang Suen , Henry Choy , Paul Cheng , Lin Liang
IPC分类号： H04N974
CPC分类号： G09G5/12 , G09G2310/0224 , G09G2320/0247 , G09G2340/10 , H04N5/073 , H04N5/445 , H04N9/641 , H04N21/42653 , H04N21/4305 , H04N21/4307 , H04N21/431
摘要： A single chip system including a first input channel for receiving digital video input data, a second channel for receiving computer graphics data, means for synchronizing the two channels to one another utilizing timing signals which may be selected to provide the most accurate timing available, means for changing the rate of presentation of the computer graphics signals to match the rate of presentation of the video signals, means for adjusting the format in which the computer graphics signals are presented to the same format as the format in which the video signals are presented, and means for selectively blending the computer graphics and video signals furnished as video input data without modification for presentation on a single output display.
摘要翻译： 包括用于接收数字视频输入数据的第一输入通道，用于接收计算机图形数据的第二通道的单芯片系统，利用可被选择以提供最准确的定时可用的定时信号将两个通道彼此同步的装置 为了改变计算机图形信号的显示速率以匹配视频信号的呈现速率，用于将显示计算机图形信号的格式调整为与呈现视频信号的格式相同的格式的装置， 以及用于选择性地混合作为视频输入数据提供的计算机图形和视频信号的装置，而不进行修改以在单个输出显示器上呈现。
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27.发明授权Circuit for logical stream sorting at CPU transfer time division for multiplexed (TDM) including bus interface circuitry 失效用于CPU传输时分的逻辑流排序电路，用于多路复用（TDM），包括总线接口电路
公开(公告)号：US5862343A
公开(公告)日：1999-01-19
申请号：US918943
申请日：1997-08-25
申请人： Mark Landguth , Paul Cheng
发明人： Mark Landguth , Paul Cheng
CPC分类号： H04L12/6418 , H04J3/1647 , H04L2012/6427 , H04L2012/6454 , H04L2012/6459 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13214 , H04Q2213/1322 , H04Q2213/13292 , H04Q2213/13299 , H04Q2213/1336 , H04Q2213/13389
摘要： A network-to-CPU interface circuit interfaces an isochronous physical layer to an ISA bus such that a host CPU connected to the ISA bus can communicate with the isochronous physical layer. Inbound B-channel interface circuity is connectable to receive, from the isochronous physical layer, an inbound data stream which includes a plurality of B-channels time division multiplexed into time division multiplexed (TDM) frames. The TDM frames have a predetermined format that defines at least one logical stream such that each logical stream comprises those B-channels that are time division multiplexed into corresponding predetermined locations within the TDM frames. An inbound buffer portion of a memory is provided to hold the received inbound data stream, and an outbound buffer portion of the memory is provided for holding an outbound data stream which, like the inbound data stream, includes a plurality of B-channels time division multiplexed into time division multiplexed (TDM) frames. ISA bus interface circuitry is provided for channeling a selected inbound logical stream from the inbound memory buffer to the host CPU, via the ISA bus, in response to a request from the host CPU. The ISA bus interface circuitry is also for receiving a data stream from the host CPU, via the ISA bus, and for channeling that received data stream, as an outbound logical stream, to the TDM frames in the outbound memory buffer according to the predetermined format. Outbound B-channel interface circuity is provided to transmit the outbound data stream from the outbound memory buffer to the isochronous physical layer.
摘要翻译： 网络到CPU接口电路将同步物理层接口到ISA总线，使得连接到ISA总线的主机CPU能够与等时物理层进行通信。 入站B信道接口电路可连接从等时物理层接收包括多个时分复用到时分复用（TDM）帧的多个B信道的入站数据流。 TDM帧具有定义至少一个逻辑流的预定格式，使得每个逻辑流包括时分多路复用到TDM帧内相应的预定位置的那些B信道。 提供存储器的入站缓冲器部分以保持所接收的入站数据流，并且提供存储器的出站缓冲器部分用于保持出站数据流，其与入站数据流一样，包括多个B信道时分 多路复用到时分复用（TDM）帧。 提供ISA总线接口电路，用于响应于来自主机CPU的请求，将选定的入站逻辑流从入站存储器缓冲器经由ISA总线传送到主机CPU。 ISA总线接口电路还用于经由ISA总线从主机CPU接收数据流，并根据预定格式将接收到的数据流作为出站逻辑流传送到出站存储器缓冲器中的TDM帧 。 提供出站B通道接口电路，用于将出站数据流从出站存储器缓冲区发送到同步物理层。
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公开(公告)号：US5580034A
公开(公告)日：1996-12-03
申请号：US510112
申请日：1995-08-01
申请人： Paul Cheng
发明人： Paul Cheng
摘要： A shock absorbing oil cylinder has a main body, a seal ring, a shaft cover, and a shaft. The main body has a circular recess thereon and a cover seat on its top. An adjustable seat ring is passed through the main body beneath the cover seat. A seal ring is in the cover seat. The outer rim of the seal ring is covered by a glued rubber. An oil inlet is in the center of the seal ring. A soft pad is in the seal ring. A leak prevention ring is on the oil inlet. A bolt is inserted into the soft pad. A shaft cover covers the cover seat. A shaft is in the main body and is inserted in a piston. The damper rings are disposed on the piston and beneath the piston. A shaft ring is inserted in the valve seat. A retaining ring is inserted in the circular recess. The cushion ring is beneath the main body. A spring is located between the adjustable seat ring and the shaft seat ring.
摘要翻译： 减震油缸具有主体，密封环，轴套和轴。 主体在其上具有圆形凹部，顶部具有盖座。 一个可调节的座圈穿过座椅下面的主体。 密封圈位于盖座上。 密封环的外缘由胶合橡胶覆盖。 进油口位于密封环的中心。 密封圈中有一个软垫。 进油口上有防漏环。 螺栓插入软垫。 轴盖覆盖盖座。 轴位于主体中并插入活塞中。 阻尼环设置在活塞上并在活塞下方。 轴环插入阀座。 保持环插入圆形凹槽中。 缓冲环位于主体下方。 弹簧位于可调节的座圈和轴座环之间。
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