公开(公告)号：US20250096747A1

公开(公告)日：2025-03-20

申请号：US18470039

申请日：2023-09-19

Applicant: QUALCOMM INCORPORATED

Inventor： Laya MOHAMMADI ,  Chirag Dipak PATEL ,  Chuan WANG ,  Bhushan Shanti ASURI

IPC: H03F3/195 ,  H03F1/56 ,  H04B1/40

Abstract: A phase shifter having an input matching network, a vector modulator connected to the input matching network, the vector modulator configured to alter an amplitude of signals provided by the input matching network, bias networks coupled to outputs of the vector modulator, and a combining circuit connected to the outputs of the vector modulator, the combining circuit configured to generate a first phase (θ1) signal from the outputs of the vector modulator.

公开(公告)号：US20250062754A1

公开(公告)日：2025-02-20

申请号：US18449552

申请日：2023-08-14

Applicant: QUALCOMM Incorporated

Inventor： Shahin MEHDIZAD TALEIE ,  Dongwon SEO ,  Bhushan Shanti ASURI ,  Ibrahim Ramez CHAMAS ,  Huan WANG ,  Zhiheng WANG ,  Reza RODD

IPC: H03K5/01 ,  H03K19/20

Abstract: Certain aspects of the present disclosure provide apparatus and techniques to generate signals for clock spur attenuation. An example apparatus generally includes: one or more circuits coupled between a voltage rail and a reference potential node, wherein the one or more circuits are configured to operate using a clock signal; a delay signal generator configured to receive the clock signal and apply a delay to the clock signal to generate a delay signal; and signal generation circuitry coupled between the voltage rail and the reference potential node and configured to generate a signal fluctuation on at least one of the voltage rail or the reference potential node based on the delay signal.

公开(公告)号：US20230049925A1

公开(公告)日：2023-02-16

申请号：US17478431

申请日：2021-09-17

Applicant: QUALCOMM INCORPORATED

Inventor： Yung-Chung LO ,  Hyejeong SONG ,  Bhushan Shanti ASURI ,  Sahar NOZARI

IPC: H03F3/24 ,  H03F1/02 ,  H04B1/40

Abstract: A transceiver interface circuit, comprising a driver amplifier (DA), a load line impedance modulation circuit coupled to the DA; and multiple selectable output ports coupled to the load line impedance modulation circuit, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of output ports coupled to the load line impedance modulation circuit.

公开(公告)号：US20220320021A1

公开(公告)日：2022-10-06

申请号：US17843986

申请日：2022-06-18

Applicant: QUALCOMM Incorporated

Inventor： Ibrahim Ramez CHAMAS ,  Mohamed ABOUZIED ,  Bhushan Shanti ASURI

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/58 ,  H03H7/42

Abstract: An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

公开(公告)号：US20220189886A1

公开(公告)日：2022-06-16

申请号：US17118253

申请日：2020-12-10

Applicant: QUALCOMM Incorporated

Inventor： Muhammad HASSAN ,  Bhushan Shanti ASURI ,  Jeremy Darren DUNWORTH ,  Ravi SRIDHARA

IPC: H01L23/60 ,  H03F3/24 ,  H03F3/195

Abstract: According to certain aspects, a chip includes a pad, a power amplifier, a transformer coupled between an output of the power amplifier and the pad, a transistor coupled between the transformer and a ground, and a first clamp circuit coupled between a gate of the transistor and a drain of the transistor.

公开(公告)号：US20220099719A1

公开(公告)日：2022-03-31

申请号：US17039827

申请日：2020-09-30

Applicant: QUALCOMM Incorporated

Inventor： Bhushan Shanti ASURI ,  Chinmaya MISHRA ,  Omar Essam EL-AASSAR

IPC: G01R27/02 ,  G01R25/04

Abstract: In certain aspects, an apparatus includes a power detector coupled between a power amplifier and an antenna, and a voltage detector coupled between the power amplifier and the antenna. The apparatus also includes a phase shifter coupled to the power detector, and a load measurement circuit coupled to the power detector, the voltage detector, and the phase shifter.

公开(公告)号：US20210099140A1

公开(公告)日：2021-04-01

申请号：US16589175

申请日：2019-10-01

Applicant: QUALCOMM INCORPORATED

Inventor： Muhammad HASSAN ,  Bhushan Shanti ASURI ,  Mahim RANJAN

IPC: H03F3/193 ,  H03F3/45 ,  H03F1/32 ,  H03F1/56 ,  H03H11/32

Abstract: An amplifier circuit includes an amplifier, a balun comprising a primary side having a primary inductance and a secondary side having a secondary inductance, the primary side coupled to an output of the amplifier, the secondary side coupled to a first output path of the amplifier circuit and a second output path of the amplifier circuit, a shunt inductance coupled to the first output path; and a compensating inductance in the balun, the compensating inductance coupled between a first node and a second node, the first node coupling the compensating inductance to the first output path, the second node coupling the secondary inductance to the compensating inductance.

公开(公告)号：US20200169266A1

公开(公告)日：2020-05-28

申请号：US16202723

申请日：2018-11-28

Applicant: QUALCOMM Incorporated

Inventor： Shahin MEHDIZAD TALEIE ,  Behnam SEDIGHI ,  Dongwon SEO ,  Parisa MAHMOUDIDARYAN ,  Bhushan Shanti ASURI ,  Sang-June PARK ,  Shrenik PATEL

IPC: H03M1/66

Abstract: Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. One example system for digital-to-analog conversion generally includes a first digital-to-analog converter (DAC) having an input coupled to an input node of the system and a mixing-mode DAC having an input coupled to an input node of the system. The mixing-mode DAC may include a second DAC and a mixer, an output of the second DAC being coupled to an input of the mixer. The system may also include a combiner, wherein an output of the first DAC is coupled to a first input of the combiner, and wherein an output of the mixer is coupled to a second input of the combiner.

公开(公告)号：US20150139358A1

公开(公告)日：2015-05-21

申请号：US14083240

申请日：2013-11-18

Applicant: QUALCOMM INCORPORATED

Inventor： Bhushan Shanti ASURI ,  Thomas Domenick MARRA ,  Mohammad FARAZIAN ,  Gurkanwal Singh SAHOTA

IPC: H04B1/04 ,  H04B17/00

CPC classification number: H04B1/0475 ,  H04B17/10 ,  H04B17/13 ,  H04B2001/0425 ,  H04L27/361 ,  H04L27/367

Abstract: Exemplary embodiments are related to digital pre-distortion in envelope tracking systems. A device may include an amplitude modulation-to-phase modulation (AM-PM) distortion unit configured to generate an AM-PM distortion component in response to receipt of phase data of an input transmit signal. The device may also include a local oscillator (LO) path coupled to the distortion unit and configured to convey a local oscillator (LO) signal that varies based on the AM-PM distortion component.

Abstract translation: 示例性实施例涉及包络跟踪系统中的数字预失真。 设备可以包括被配置为响应于接收到输入发射信号的相位数据而产生AM-PM失真分量的幅度调制 - 相位调制（AM-PM）失真单元。 该装置还可以包括耦合到失真单元并被配置为传送基于AM-PM失真分量变化的本地振荡器（LO）信号的本地振荡器（LO）路径。