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    Low-power always-on face detection, tracking, recognition and/or analysis using events-based vision sensor
    23.
    发明授权
    Low-power always-on face detection, tracking, recognition and/or analysis using events-based vision sensor 有权
    使用基于事件的视觉传感器进行低功耗持续面部检测，跟踪，识别和/或分析

    公开(公告)号：US09554100B2

    公开(公告)日：2017-01-24

    申请号：US14866549

    申请日：2015-09-25

    Applicant: QUALCOMM Incorporated

    Inventor： Evgeni P. Gousev ,  Alok Govil ,  Jacek Maitan ,  Nelson Rasquinha ,  Venkat Rangan

    IPC: H04N7/18 ,  H04N5/235 ,  H04N5/232 ,  G06K9/46 ,  G06K9/60 ,  G06K9/00

    CPC classification number: H04N7/183 ,  G06F3/011 ,  G06K9/00228 ,  G06K9/00255 ,  G06K9/00342 ,  G06K9/00355 ,  G06K9/00362 ,  G06K9/00664 ,  G06K9/00973 ,  G06K9/00986 ,  G06K9/4619 ,  G06K9/605 ,  G06K9/6267 ,  G06K2009/4666 ,  H04N5/23219 ,  H04N5/23241 ,  H04N5/2355

    Abstract: Techniques disclosed herein utilize a vision sensor that integrates a special-purpose camera with dedicated computer vision (CV) computation hardware and a dedicated low-power microprocessor for the purposes of detecting, tracking, recognizing, and/or analyzing subjects, objects, and scenes in the view of the camera. The vision sensor processes the information retrieved from the camera using the included low-power microprocessor and sends “events” (or indications that one or more reference occurrences have occurred, and, possibly, associated data) for the main processor only when needed or as defined and configured by the application. This allows the general-purpose microprocessor (which is typically relatively high-speed and high-power to support a variety of applications) to stay in a low-power (e.g., sleep mode) most of the time as conventional, while becoming active only when events are received from the vision sensor.

    Abstract translation: 本文公开的技术利用视觉传感器，其将特殊用途相机与专用计算机视觉（CV）计算硬件和专用低功率微处理器集成，用于检测，跟踪，识别和/或分析主体，对象和场景 在相机的视野。 视觉传感器使用附带的低功率微处理器处理从摄像机检索的信息，并且仅在需要时发送主处理器的“事件”（或发生了一个或多个参考事件以及可能的关联数据），或者作为 由应用程序定义和配置。 这允许通用微处理器（通常是相对高速和大功率来支持各种应用程序）在大多数时间内保持在低功率（例如，睡眠模式）中，同时仅成为活动的 当从视觉传感器接收到事件时。

    Method and apparatus for time management and scheduling for sychronous processing on a cluster of processing nodes
    24.
    发明授权
    Method and apparatus for time management and scheduling for sychronous processing on a cluster of processing nodes 有权
    用于在一组处理节点上进行同步处理的时间管理和调度的方法和装置

    公开(公告)号：US09373074B2

    公开(公告)日：2016-06-21

    申请号：US13647772

    申请日：2012-10-09

    Applicant: QUALCOMM Incorporated

    Inventor： Jeffrey A. Levin ,  Venkat Rangan ,  Robert J. Vachon

    IPC: G06F9/46 ,  G06N3/04 ,  G06F9/50 ,  G06N3/10 ,  G06F9/48 ,  G06F9/52

    CPC classification number: G06N3/049 ,  G06F9/4881 ,  G06F9/5038 ,  G06F9/52 ,  G06N3/10

    Abstract: Certain aspects of the present disclosure provide techniques for time management and scheduling of synchronous neural processing on a cluster of processing nodes. A slip (or offset) may be introduced between processing nodes of a distributed processing system formed by a plurality of interconnected processing nodes, to enable faster nodes to continue processing without waiting for slower nodes to catch up. In certain aspects, a processing node, after completing each processing step, may check for received completion packets and apply a defined constraint to determine whether it may start processing a subsequent step or not.

    Abstract translation: 本公开的某些方面提供了用于在一组处理节点上进行同步神经处理的时间管理和调度的技术。 可以在由多个互连的处理节点形成的分布式处理系统的处理节点之间引入滑移（或偏移），以使更快的节点能够继续处理，而不用等待较慢的节点赶上。 在某些方面，处理节点在完成每个处理步骤之后，可以检查接收到的完成分组，并应用定义的约束来确定它是否可以开始处理后续步骤。

    SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR
    26.
    发明申请
    SHARED MEMORY ARCHITECTURE FOR A NEURAL SIMULATOR 审中-公开
    用于神经模拟器的共享存储器架构

    公开(公告)号：US20150106317A1

    公开(公告)日：2015-04-16

    申请号：US14451954

    申请日：2014-08-05

    Applicant: QUALCOMM Incorporated

    Inventor： Venkat Rangan ,  Jan Krzys Wegrzyn ,  Jeffrey Alexander Levin ,  John Paul Daniels

    IPC: G06N3/10 ,  G06F12/02

    CPC classification number: G06F12/02 ,  G06N3/049 ,  G06N3/063

    Abstract: Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.

    Abstract translation: 本公开的方面提供了在硬件中实现的人造神经系统模拟器中分配存储器的方法和装置。 根据某些方面，可以确定正在模拟的人造神经系统的一个或多个组件的存储器资源需求，并且可以将共享存储器池（其可以包括片上和/或片外RAM）的部分分配给 组件基于确定。

    SYSTEM FOR EYE TRACKING
    27.
    发明申请
    SYSTEM FOR EYE TRACKING 审中-公开

    公开(公告)号：US20180332275A1

    公开(公告)日：2018-11-15

    申请号：US15973182

    申请日：2018-05-07

    Applicant: QUALCOMM Incorporated

    Inventor： Russell Gruhlke ,  Venkat Rangan ,  Ravishankar Sivalingam ,  Kebin Li

    IPC: H04N13/383 ,  H04N5/33 ,  H04N13/332 ,  F21V8/00

    Abstract: Certain aspects of the present disclosure relate to a system. In some aspects, the system may include an emitter configured to emit a light. The system may include a light guide configured to direct the light toward a pupil of an eye. The light guide may include a directing portion configured to propagate the light. The light guide may include a turning portion configured to receive light from the directing portion and direct the light toward the pupil of the eye and configured to receive reflected light directed from the pupil of the eye and direct the reflected light toward the directing portion. The system may include a receiver configured to receive the reflected light from the light guide. The system may include a processor configured to determine a gaze direction of the pupil of the eye based at least in part on the reflected light received by the receiver.

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