Abstract:
A high voltage driver may include: a low side switching unit including first to n-th N-channel metal oxide semiconductor (NMOS) transistors; a high side switching unit including first and second to n-th P-channel MOS (PMOS) transistors; a voltage dividing unit dividing a voltage between the output terminal and the ground; a first constant voltage unit providing a constant voltage and a unidirectional signal path between a source and a gate of each of the first to n-th NMOS transistors; a second constant voltage unit providing a constant voltage and a unidirectional signal path between a source and a gate of each of the first to n-th PMOS transistors; a first charging unit providing a charged voltage to each of the gates of the second to n-th NMOS transistors; and a second charging unit providing a charged voltage to each of the gates of the second to n-th PMOS transistors.
Abstract:
There is provided an apparatus for generating a driving signal, the apparatus including: a first driving signal generation circuit generating a first driving signal; a second driving signal generation circuit generating a second driving signal, the second driving signal generation circuit including at least two transistors and a pulse generation unit; and a control unit controlling the first and second driving signal generation circuits so that they generate the first and second driving signals selectively.
Abstract:
A chip component includes a magnetic substrate having ferrite layers, and an insulating layer disposed on the magnetic substrate and having an electrode disposed therein. An external electrode is connected to the electrode on the insulating layer. The magnetic substrate and the insulating layer have a chemical coupling structure formed on an interface therebetween. The chemical coupling structure includes Si—O—C or Si—O—N.
Abstract:
A capacitance sensing apparatus includes: a driving circuit unit applying a driving signal of a first period to a node capacitor; a first integrating circuit unit integrating voltage charged in the node capacitor to generate output voltage of which a voltage level is changed twice during a second period; a buffer capacitor charged or discharged by the output voltage of the first integrating circuit unit; a second integrating circuit unit integrating voltage charged in the buffer capacitor to generate output voltage of which a voltage level is changed twice during the first period; and an amplifying unit differentially amplifying non-inverted output voltage and inverted output voltage of the second integrating circuit unit, wherein the amplifying unit amplifies voltage corresponding to a difference between the non-inverted output voltage and the inverted output voltage during a reset section of the second integrating circuit unit to generate offset information.
Abstract:
The present invention relates to an adaptive filter, which includes an analog filter; an analog-digital converter; a modem; a control unit connected to the modem to detect an adjacent interference signal adjacent to an interested channel signal; and a filter control signal generating unit connected to the control unit to generate a filter control signal for controlling a capacity of a variable capacitor, and a method of adaptive filtering and can control a filter passband adaptively to the adjacent interference signal.