公开(公告)号：US11495529B2

公开(公告)日：2022-11-08

申请号：US16929378

申请日：2020-07-15

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mark Griswold ,  Michael J. Seddon

IPC: H01L21/78 ,  H01L23/522 ,  H01L23/34 ,  H01L21/786 ,  H01L21/02 ,  H01L23/12

Abstract: Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

公开(公告)号：US11152356B2

公开(公告)日：2021-10-19

申请号：US16446923

申请日：2019-06-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Amit Paul ,  Arash Elhami Khorasani ,  Mark Griswold

IPC: H01L29/41 ,  H01L27/06 ,  H01L21/8234 ,  H01L21/8232

Abstract: In an embodiment, a semiconductor device includes a resistor that overlies a doped region of the semiconductor device. The resistor is formed as an elongated element that is formed into a pattern of a spiral. An embodiment of the pattern of the resistor includes a plurality of revolutions from the starting point to an ending point. The resistor material has one of a separation distance between adjacent revolutions that increases with distance along a periphery of the resistor material or a width of the resistor material that increases with distance along the periphery of the resistor material.

公开(公告)号：US11056590B1

公开(公告)日：2021-07-06

申请号：US16781434

申请日：2020-02-04

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Arash Elhami Khorasani ,  Mark Griswold ,  Richard Taylor

IPC: H01L29/78 ,  H01L29/10

Abstract: In a general aspect, an integrated circuit (IC) can include a low-voltage region including a low-side driver circuit configured to control a low-side switch of a power converter. The IC can also include a high-voltage region including a floating region of a first conductivity and a high-voltage sensing device disposed in the floating region. The high-voltage sensing device can include a junction-field effect transistor (JFET), and a voltage divider. The voltage divider can include a first terminal coupled to a drain of the JFET, a second terminal coupled to a gate of the JFET, and a sense terminal, the voltage divider being configured to a provide, on the sense terminal. The IC can further include a high-side driver circuit coupled with the sense terminal. The high-side driver circuit can be configured to control a high-side switch of the power converter based on the voltage on the sense terminal.

公开(公告)号：US09263598B2

公开(公告)日：2016-02-16

申请号：US14181207

申请日：2014-02-14

Applicant: Semiconductor Components Industries, LLC

Inventor： Mohammed Tanvir Quddus ,  Mihir Mudholkar ,  Mark Griswold ,  Ali Salih

IPC: H01L29/00 ,  H01L29/872 ,  H01L29/66 ,  H01L29/47

CPC classification number: H01L29/47 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/28537 ,  H01L29/0615 ,  H01L29/66143 ,  H01L29/66643 ,  H01L29/7839 ,  H01L29/872 ,  H01L29/8725

Abstract: A Schottky device includes a barrier height adjustment layer in a portion of a semiconductor material. In accordance with an embodiment, the Schottky device is formed from a semiconductor material of a first conductivity type which has a barrier height adjustment layer of a second conductivity type that extends from a first major surface of the semiconductor material into the semiconductor material a distance that is less than a zero bias depletion boundary. A Schottky contact is formed in contact with the doped layer.

Abstract translation: 肖特基器件包括在半导体材料的一部分中的势垒高度调节层。 根据一个实施例，肖特基器件由第一导电类型的半导体材料形成，该半导体材料具有从半导体材料的第一主表面延伸到半导体材料中的第二导电类型的势垒高度调节层， 小于零偏置耗尽边界。 形成与掺杂层接触的肖特基接触。