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    Electronic device including a junction field-effect transistor
    4.
    发明授权
    Electronic device including a junction field-effect transistor 有权

    公开(公告)号：US11289613B2

    公开(公告)日：2022-03-29

    申请号：US16674625

    申请日：2019-11-05

    Applicant: Semiconductor Components Industries, LLC

    Inventor： Weize Chen ,  Mark Griswold

    IPC: H01L29/00 ,  H01L29/808 ,  H01L27/06 ,  H01L29/40 ,  H01L29/10 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06

    Abstract: An electronic device can include a JFET that can include a drain contact region, a channel region spaced apart from the drain contact region, and a gate region adjacent the channel region. In an embodiment, the gate region includes a relatively heavier doped portion and a relatively lighter portion closer to the drain contact region. In another embodiment, a gate field electrode can be extended beyond a field isolation structure and overlie a channel of the JFET. In a further embodiment, a region having relatively low dopant concentration can be along the drain side of the conduction path, where the region is between two other more heavily doped regions. In another embodiment, alternating conducting channel and gate regions can be used to allow lateral and vertical pinching off of the conducting channel regions.

    Electronic Device Including a Junction Field-Effect Transistor
    5.
    发明申请
    Electronic Device Including a Junction Field-Effect Transistor 有权

    公开(公告)号：US20210119059A1

    公开(公告)日：2021-04-22

    申请号：US16674625

    申请日：2019-11-05

    Applicant: Semiconductor Components Industries, LLC

    Inventor： Weize Chen ,  Mark Griswold

    IPC: H01L29/808 ,  H01L27/06 ,  H01L29/40 ,  H01L29/10 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66

    Abstract: An electronic device can include a JFET that can include a drain contact region, a channel region spaced apart from the drain contact region, and a gate region adjacent the channel region. In an embodiment, the gate region includes a relatively heavier doped portion and a relatively lighter portion closer to the drain contact region. In another embodiment, a gate field electrode can be extended beyond a field isolation structure and overlie a channel of the JFET. In a further embodiment, a region having relatively low dopant concentration can be along the drain side of the conduction path, where the region is between two other more heavily doped regions. In another embodiment, alternating conducting channel and gate regions can be used to allow lateral and vertical pinching off of the conducting channel regions.

    Semiconductor devices and methods of manufacturing semiconductor devices
    7.
    发明授权
    Semiconductor devices and methods of manufacturing semiconductor devices 有权

    公开(公告)号：US12087760B2

    公开(公告)日：2024-09-10

    申请号：US17662263

    申请日：2022-05-06

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Derrick Johnson ,  Yupeng Chen ,  Ralph N. Wall ,  Mark Griswold

    IPC: H01L27/02 ,  H01L27/092

    CPC classification number: H01L27/0262 ,  H01L27/0928

    Abstract: In an example, a semiconductor device includes a semiconductor substrate of a first conductivity type and a semiconductor region of the first conductivity type over the semiconductor substrate. A well region of a second conductivity type is in the semiconductor region. A doped region of the first conductivity type is in the well region. A doped region of the second conductivity type is in the well region. A doped region of the second conductivity type is in the semiconductor substrate at a bottom side. A doped region of the first conductivity type is in the semiconductor substrate at the bottom side. A first conductor is at a top side of the semiconductor region and a second conductor is at the bottom side. In some examples, one or more of doped regions at the bottom side is a patterned doped region.

    Double-integrated silicon control rectifier transistor and related methods
    9.
    发明授权
    Double-integrated silicon control rectifier transistor and related methods 有权

    公开(公告)号：US10700057B1

    公开(公告)日：2020-06-30

    申请号：US16245913

    申请日：2019-01-11

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Arash Elhami Khorasani ,  Mark Griswold

    IPC: H01L27/02 ,  H01L29/10 ,  H01L29/808 ,  H01L23/60

    Abstract: The disclosed embodiments include an ESD robust transistor with a compound-SCR protection. The transistor may include a semiconductor substrate having a first conductivity type, a drain region coupled with the semiconductor substrate having a drain SCR component with a first drain region of the first conductivity type and a second drain region of the second conductivity type. The transistor may also include a source coupled with the semiconductor substrate, a channel region of the second conductivity type, and a gate coupled with the channel region having SCR components with a first gate region of the first conductivity type and a second gate region of the second conductivity type. The drain SCR components and the gate SCR components may create a low resistance discharge path along the channel region that activates in response to the ESD such that the ESD discharges through the transistor without causing damage to the transistor.

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