THIN FILM TRANSISTOR ARRAY PANEL
    21.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 有权
    薄膜晶体管阵列

    公开(公告)号:US20160365368A1

    公开(公告)日:2016-12-15

    申请号:US14963769

    申请日:2015-12-09

    Abstract: A thin-film transistor array panel includes a substrate, a first gate electrode disposed on the substrate, a first self-assembled monolayer disposed on the first gate electrode, a gate insulating layer disposed on the first self-assembled monolayer, a semiconductor disposed on the gate insulating layer, a drain electrode overlapping the semiconductor, the drain electrode being separated from and facing a source electrode with respect to the semiconductor, a first interlayer insulating layer disposed on the source electrode and the drain electrode, a second self-assembled monolayer disposed on the first interlayer insulating layer, a second gate electrode disposed on the second self-assembled monolayer, a second interlayer insulating layer disposed on the second gate electrode, and a pixel electrode disposed on the second interlayer insulating layer and connected to the drain electrode.

    Abstract translation: 薄膜晶体管阵列面板包括基板,设置在基板上的第一栅极电极,设置在第一栅电极上的第一自组装单层,设置在第一自组装单层上的栅极绝缘层,设置在第一自组装单层上的半导体 所述栅极绝缘层,与所述半导体重叠的漏电极,所述漏电极相对于所述半导体分离并面对源电极,设置在所述源电极和所述漏电极上的第一层间绝缘层,第二自组装单层 设置在第一层间绝缘层上的第二栅电极,设置在第二自组装单层上的第二栅电极,设置在第二栅电极上的第二层间绝缘层,以及设置在第二层间绝缘层上并连接到漏极的像素电极 。

    THIN FILM TRANSISTOR DISPLAY PANEL
    22.
    发明申请
    THIN FILM TRANSISTOR DISPLAY PANEL 有权
    薄膜晶体管显示面板

    公开(公告)号:US20140103332A1

    公开(公告)日:2014-04-17

    申请号:US13789335

    申请日:2013-03-07

    Abstract: A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.

    Abstract translation: 薄膜晶体管显示面板a包括透明基板; 位于所述基板上的栅电极; 位于所述栅电极上的栅极绝缘层; 位于所述栅绝缘层上并包括沟道区的半导体层; 位于半导体层上且彼此面对的源电极和漏电极; 以及钝化层,被配置为覆盖所述源电极,所述漏电极和所述半导体层,其中所述半导体层包括在所述源电极和所述栅电极之间的相对较厚的第一部分,以及在所述漏电极和所述半导体层之间的相对较薄的第二部分 栅电极重叠,相对较厚的第一部分足够厚,以便如果第一部分与第二部分一样薄,则基本上可以减少否则可能在栅极电极到栅介质界面处发生的电荷捕获现象。

    DISPLAY DEVICE
    23.
    发明公开
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20240341132A1

    公开(公告)日:2024-10-10

    申请号:US18745977

    申请日:2024-06-17

    Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.

    DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20240188335A1

    公开(公告)日:2024-06-06

    申请号:US18356445

    申请日:2023-07-21

    CPC classification number: H10K59/122 H10K59/1201 H10K71/231 H10K2102/351

    Abstract: A display device and a manufacturing method of the display device are provided. The display device includes a substrate, a passivation layer disposed on the substrate, a metal oxide layer disposed on the passivation layer, a via layer disposed on the metal oxide layer, a first electrode disposed on the via layer, a pixel defining layer covering the metal oxide layer and an edge portion of the first electrode and dividing a light-emitting area, an organic layer disposed on the first electrode and the pixel defining layer, and a second electrode disposed on the organic layer, wherein a side of the pixel defining layer protrudes more outward than a side of the metal oxide layer, and at least a portion of the organic layer is disconnected at a point between the side of the pixel defining layer and the passivation layer.

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20230380228A1

    公开(公告)日:2023-11-23

    申请号:US18113200

    申请日:2023-02-23

    CPC classification number: H10K59/131 H10K59/1201 H10K59/873

    Abstract: A display device including a first substrate including a display area, and a non-display area, a second substrate on the first substrate, and a sealing member in a sealing area of the non-display area. The first substrate includes a first base portion, a first conductive layer including a first signal line and a lower light blocking layer, on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer overlapping the lower light blocking layer, on the buffer layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including second and third signal lines electrically connected to the first signal line, and a gate electrode overlapping the semiconductor layer, on the gate insulating layer. In plan view, the first signal line is between the second signal line and the third signal line. The first signal line overlaps the sealing member.

    DISPLAY DEVICE
    27.
    发明申请

    公开(公告)号:US20220165832A1

    公开(公告)日:2022-05-26

    申请号:US17467418

    申请日:2021-09-06

    Abstract: A display device includes a light emitting element, a first transistor, a second transistor, and a diode. The first transistor may control a driving current flowing to the light emitting element depending on a voltage applied to a gate electrode of the first transistor. The second transistor is electrically connected between the gate electrode of the first transistor and a first electrode of the first transistor. A first electrode of the diode is electrically connected to a first electrode of the second transistor. A second electrode of the diode is electrically connected to the gate electrode of the first transistor.

    DISPLAY DEVICE
    28.
    发明申请

    公开(公告)号:US20220140000A1

    公开(公告)日:2022-05-05

    申请号:US17471679

    申请日:2021-09-10

    Abstract: A display device includes first banks on a substrate and spaced apart from each other, a first electrode and a second electrode on the first banks and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, and light emitting elements on the first insulating layer and each having ends on the first electrode and the second electrode. Each of the first banks includes a first pattern portion including concave portions and convex portions. The first pattern portions of the first banks are disposed on side surfaces of the first banks. The side surfaces are spaced apart and face each other. Each of the first electrode and the second electrode includes a second pattern portion on the first pattern portion and having a pattern shape corresponding to the first pattern portion on a surface thereof.

    DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME

    公开(公告)号:US20210320162A1

    公开(公告)日:2021-10-14

    申请号:US17107638

    申请日:2020-11-30

    Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.

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