公开(公告)号：US20210202397A1

公开(公告)日：2021-07-01

申请号：US17007945

申请日：2020-08-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonsung Kim ,  Doohwan Lee ,  Taeho Ko ,  Bongsoo Kim ,  Seokbong Park

IPC: H01L23/538 ,  H01L23/29 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01P3/08 ,  H01P11/00

Abstract: A semiconductor package includes a lower connection structure, a semiconductor chip on the lower connection structure, an upper connection structure including a first conductive pattern layer on the semiconductor chip, a first insulating layer on the first conductive pattern layer, a second conductive pattern layer on the first insulating layer, a first via penetrating the first insulating layer to extend between the first conductive pattern layer and the second conductive pattern layer, and a second insulating layer extending between a side surface of the first via and the first insulating layer, and an intermediate connection structure between the lower connection structure and the upper connection structure. A chemical composition of the first insulating layer may differ from a chemical composition of the second insulating layer.

公开(公告)号：US20200152565A1

公开(公告)日：2020-05-14

申请号：US16580480

申请日：2019-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon Choi ,  Doohwan Lee ,  Byungho Kim ,  Jooyoung Choi

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/13 ,  H01L21/48

Abstract: A semiconductor package includes a semiconductor chip including a connection pad disposed on an active surface of the semiconductor chip, a passivation layer disposed on the connection pad and the active surface and having an opening exposing at least a portion of the connection pad, and a capping pad covering the connection pad exposed to the opening; an encapsulant covering at least a portion of the semiconductor chip; and a connection structure disposed on the active surface of the semiconductor chip and including a connection via connected to the capping pad and a redistribution layer connected to the connection via, wherein the capping pad includes: a central portion disposed in the opening, and a peripheral portion extending from the central portion onto the passivation layer, and having a crystal grain having a size different from that of the crystal grain of the central portion.

公开(公告)号：US12283446B2

公开(公告)日：2025-04-22

申请号：US18077882

申请日：2022-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongil Yang ,  Taeyoung Kim ,  Hyoseok Na ,  Jonghyun Park ,  Doohwan Lee

IPC: H01H9/54 ,  H01H9/02 ,  H01H59/00

Abstract: A switch in an electronic device includes a substrate, a first signal line, a second signal line, and a ground bridge. The first signal line is on the substrate and extends in a first direction. The second signal line is on the substrate and is spaced apart from the first signal line in a first direction parallel with the first signal line to branch the wireless communication signal at a first point and a second point of the first signal line. The ground bridge is at least partially movable in a space between the first signal line and the second signal line. A first capacitor is between a first point of the first signal line and one end of the second signal line, and a second capacitor is between a second point of the first signal line and the other end of the second signal line.

公开(公告)号：US12243791B2

公开(公告)日：2025-03-04

申请号：US17749825

申请日：2022-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunghawn Bae ,  Doohwan Lee ,  Jooyoung Choi

IPC: H01L23/36 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498

Abstract: Provided is method of manufacturing a semiconductor device. The method includes: forming a metal layer on a carrier; forming a conductor pattern layer on the metal layer; mounting a semiconductor chip on a tape; forming an encapsulant covering the semiconductor chip; attaching the conductor pattern layer to the encapsulant; removing the tape; and forming a connection structure electrically connected to the semiconductor chip in an area from which the tape is removed.

公开(公告)号：US20240235586A9

公开(公告)日：2024-07-11

申请号：US18403443

申请日：2024-01-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： John Moon ,  Hyoseok Na ,  Dongil Yang ,  Doohwan Lee

IPC: H04B1/04 ,  H03F3/24 ,  H04B1/44

CPC classification number: H04B1/0458 ,  H03F3/245 ,  H04B1/0475 ,  H04B1/44 ,  H03F2200/294 ,  H04B2001/0416

Abstract: Provided is an electronic device including a transceiver configured to output a first transmission signal, a first radio frequency (RF) module configured to amplify the first transmission signal obtained from the transceiver to generate an amplified first transmission signal, a first antenna configured to transmit the amplified first transmission signal, and a main coupler provided outside the first RF module along a transmission path between the first RF module and the first antenna, and configured to output a first coupling signal corresponding to the first transmission signal. The first RF module includes at least one power amplifier configured to amplify the first transmission signal, and a switch configured to connect one of a plurality of input ports, including at least one input port connected to the main coupler and configured to receive the first coupling signal output by the main coupler, with an output port connected to the transceiver.

公开(公告)号：US12015014B2

公开(公告)日：2024-06-18

申请号：US17679861

申请日：2022-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohwan Lee ,  Jungsoo Byun

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/04 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L25/0657 ,  H01L23/041 ,  H01L23/3128 ,  H01L23/5383 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2225/06562

Abstract: A semiconductor package includes a frame having a through-opening, a first semiconductor chip disposed in the through-opening and having a first active surface on which a first connection pad is disposed and a first inactive surface opposing the first active surface, a second semiconductor chip disposed on the first semiconductor chip and having a second active surface on which a second connection pad is disposed and a second inactive surface opposing the second active surface, first and second bumps electrically connected to the first and second connection pads, respectively, first and second dummy bumps disposed on a same level as levels of the first and second bumps, respectively, first and second posts electrically connected to the first and second bumps, respectively, a connection member including a redistribution layer electrically connected to each of the first and second posts, and a dummy post disposed between the frame and the connection member.

公开(公告)号：US11962341B2

公开(公告)日：2024-04-16

申请号：US17562333

申请日：2021-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yousung Lee ,  Dongil Yang ,  Hyoseok Na ,  Doohwan Lee

IPC: H04B1/44 ,  H03F3/24

CPC classification number: H04B1/44 ,  H03F3/24 ,  H03F2200/451

Abstract: The disclosure relates to an electronic device and a method for wireless communication including a power amplification circuit. According to an embodiment, an electronic device may include: a radio frequency processing module comprising radio frequency circuitry, a first power amplification circuit connected to the radio frequency processing module, a second power amplification circuit connected to the radio frequency processing module and the first power amplification circuit, and a front-end module comprising circuitry connected to the second power amplification circuit and an antenna and configured to transmit a signal, wherein the second power amplification circuit is configured to acquire, from the first power amplification circuit, a first signal obtained by amplifying a signal output from the radio frequency processing module and a second signal by amplifying a signal output from the radio frequency processing module.

公开(公告)号：US11901301B2

公开(公告)日：2024-02-13

申请号：US17306555

申请日：2021-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeongho Lee ,  Doohwan Lee

IPC: H01L23/538 ,  H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10

CPC classification number: H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L25/18 ,  H01L2221/68372 ,  H01L2224/16227 ,  H01L2224/214 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/18161

Abstract: A semiconductor package includes a frame structure having a core portion and a lower pad under the core portion. A cavity penetrates the core portion, and a semiconductor chip is arranged in the cavity and has an active surface on which a bump pad is arranged and a non-active surface facing the active surface. A redistribution structure is positioned under the frame structure and the semiconductor chip, and is connected to the lower pad and the bump pad. A molding member covers the frame structure and the semiconductor chip and fills the cavity. The molding member surrounds a lower surface of the frame structure, the active surface of the semiconductor chip, the lower pad, and the bump pad.

公开(公告)号：US20220278049A1

公开(公告)日：2022-09-01

申请号：US17664132

申请日：2022-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonsung Kim ,  Doohwan Lee ,  Taeho Ko ,  Bongsoo Kim ,  Seokbong Park

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01P3/08 ,  H01P11/00 ,  H01L23/29

Abstract: A semiconductor package includes a lower connection structure, a semiconductor chip on the lower connection structure, an upper connection structure including a first conductive pattern layer on the semiconductor chip, a first insulating layer on the first conductive pattern layer, a second conductive pattern layer on the first insulating layer, a first via penetrating the first insulating layer to extend between the first conductive pattern layer and the second conductive pattern layer, and a second insulating layer extending between a side surface of the first via and the first insulating layer, and an intermediate connection structure between the lower connection structure and the upper connection structure. A chemical composition of the first insulating layer may differ from a chemical composition of the second insulating layer.

公开(公告)号：US11127646B2

公开(公告)日：2021-09-21

申请号：US16681320

申请日：2019-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonsung Kim ,  Doohwan Lee ,  Jinseon Park

IPC: H01L23/31 ,  H01L23/13 ,  H01L23/498 ,  H01L23/552 ,  H01L25/10 ,  H01L23/538 ,  H01L23/495 ,  H01L23/00

Abstract: A fan-out semiconductor package includes a semiconductor chip, an encapsulant covering the semiconductor chip, a connection structure disposed below the semiconductor chip, and first and second metal pattern layers disposed on different levels on the semiconductor chip, wherein the first metal pattern layer is provided to electrically connect to an electrical connection member such as a frame, provided for electrical connection of the package in a vertical direction by a path via the second metal pattern layer.