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公开(公告)号：US20240363464A1
公开(公告)日：2024-10-31
申请号：US18767895
申请日：2024-07-09
发明人： Chih-Hsuan Tai , Chih-Hua Chen , Hao-Yi Tsai , Yu-Chih Huang , Chia-Hung Liu , Ting-Ting Kuo
IPC分类号： H01L23/31 , H01L21/56 , H01L21/66 , H01L21/683 , H01L21/78 , H01L23/00 , H01L23/522 , H01L23/532 , H01L23/538 , H01L25/00 , H01L25/065 , H01L25/10
CPC分类号： H01L23/3114 , H01L21/56 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L21/78 , H01L22/20 , H01L22/32 , H01L23/3128 , H01L23/5226 , H01L23/53209 , H01L23/53238 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/82 , H01L24/92 , H01L24/97 , H01L25/105 , H01L25/50 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/83 , H01L25/0657 , H01L2221/68345 , H01L2221/68359 , H01L2221/68372 , H01L2224/04105 , H01L2224/12105 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/82005 , H01L2224/83005 , H01L2224/83101 , H01L2224/92244 , H01L2225/0651 , H01L2225/06568 , H01L2225/06596 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311
摘要： A package structure is provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The through via extends through the encapsulant and the first redistribution line structure and connecting the second RDL structure. The through via is laterally separated from the redistribution layer by the dielectric layer therebetween.
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公开(公告)号：US20240363365A1
公开(公告)日：2024-10-31
申请号：US18769434
申请日：2024-07-11
发明人： Li-Hui Cheng , Szu-Wei Lu , Ping-Yin Hsieh , Chih-Hao Chen
CPC分类号： H01L21/486 , H01L21/561 , H01L24/24 , H01L24/25 , H01L24/96 , H01L25/105 , H01L2224/24175 , H01L2224/25171 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058
摘要： A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.
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公开(公告)号：US20240355794A1
公开(公告)日：2024-10-24
申请号：US18497039
申请日：2023-10-30
发明人： Choongbin Yim , Jongkook Kim , Chengtar Wu
IPC分类号： H01L25/10 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/373 , H01L23/498 , H10B80/00
CPC分类号： H01L25/105 , H01L21/4857 , H01L21/565 , H01L23/3135 , H01L23/3738 , H01L23/49822 , H01L23/49894 , H01L24/08 , H01L24/16 , H01L24/32 , H01L24/73 , H10B80/00 , H01L24/83 , H01L2224/08145 , H01L2224/08235 , H01L2224/16145 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/83862 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/1436 , H01L2924/15153 , H01L2924/3511
摘要： A semiconductor package may include: a redistribution layer structure; a semiconductor structure on the redistribution layer structure; a printed circuit board on the redistribution layer structure and extending around a side surface of the semiconductor structure; a molding material extending around the semiconductor structure on the redistribution layer structure; and a silicon interposer on the printed circuit board and the molding material.
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公开(公告)号：US12119338B2
公开(公告)日：2024-10-15
申请号：US18447655
申请日：2023-08-10
发明人： Jie Chen , Ying-Ju Chen , Hsien-Wei Chen
IPC分类号： H01L21/44 , H01L21/56 , H01L21/683 , H01L21/768 , H01L21/78 , H01L23/00 , H01L23/12 , H01L23/31 , H01L23/498 , H01L23/538 , H01L23/544 , H01L23/58 , H01L25/00 , H01L25/065 , H01L25/10
CPC分类号： H01L25/50 , H01L21/56 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/76838 , H01L21/78 , H01L23/12 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5389 , H01L23/544 , H01L23/562 , H01L23/585 , H01L24/06 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L24/32 , H01L24/48 , H01L25/105 , H01L2221/68372 , H01L2223/5442 , H01L2223/54426 , H01L2223/54486 , H01L2224/04042 , H01L2224/04105 , H01L2224/12105 , H01L2224/2518 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/85399 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/18165 , H01L2224/48091 , H01L2924/00014 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00012 , H01L2224/73265 , H01L2224/32145 , H01L2224/48227 , H01L2924/00012 , H01L2224/97 , H01L2224/73265 , H01L2224/32145 , H01L2224/48227 , H01L2924/00 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2224/45099 , H01L2924/00014 , H01L2224/45015 , H01L2924/207 , H01L2924/15311 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00 , H01L2924/00014 , H01L2224/05599 , H01L2924/00014 , H01L2224/85399
摘要： Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.
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公开(公告)号：US20240304583A1
公开(公告)日：2024-09-12
申请号：US18606973
申请日：2024-03-15
发明人： Jong Sik Paek , Doo Hyun Park
IPC分类号： H01L23/00 , H01L21/56 , H01L23/31 , H01L23/538 , H01L25/10
CPC分类号： H01L24/17 , H01L21/56 , H01L21/568 , H01L23/3135 , H01L24/19 , H01L24/85 , H01L25/105 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/92 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/16225 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/81203 , H01L2224/81815 , H01L2224/85 , H01L2224/92125 , H01L2225/1011 , H01L2225/1023 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/107 , H01L2924/00012 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/18162 , H01L2924/19107 , H01L2924/3511
摘要： A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise forming a back end of line layer on a dummy substrate, completing at least a first portion of an assembly, and removing the dummy substrate.
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公开(公告)号：US12087618B2
公开(公告)日：2024-09-10
申请号：US17231163
申请日：2021-04-15
发明人： Yu-Sheng Tang , Fu-Chen Chang , Cheng-Lin Huang , Wen-Ming Chen , Chun-Yen Lo , Kuo-Chio Liu
IPC分类号： H01L21/768 , H01L21/304 , H01L21/67 , H01L21/683 , H01L21/78 , H01L23/00 , H01L23/48 , H01L23/498 , H01L23/58 , H01L25/00 , H01L25/065 , H01L25/10
CPC分类号： H01L21/76802 , H01L21/304 , H01L21/3043 , H01L21/67011 , H01L21/67092 , H01L21/67132 , H01L21/6836 , H01L21/78 , H01L23/48 , H01L23/481 , H01L24/11 , H01L24/32 , H01L23/49816 , H01L23/562 , H01L23/585 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058
摘要： A method for sawing a semiconductor wafer is provided. The method includes sawing the semiconductor wafer with a first dicing blade to form a first opening. The semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape. The first opening is formed in the upper portion of the substrate. The method also includes sawing the semiconductor wafer with a second dicing blade from the first opening to form a second opening under the first opening and in the middle portion of the substrate. The method further includes sawing the semiconductor wafer with a third dicing blade from the second opening to form a third opening under the second opening and penetrating the lower portion of the substrate, so that the semiconductor wafer is divided into two dies. The first dicing blade, the second dicing blade, and the third dicing blade have different widths.
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公开(公告)号：US12068224B2
公开(公告)日：2024-08-20
申请号：US18080740
申请日：2022-12-14
发明人： Jing-Cheng Lin , Szu-Wei Lu
IPC分类号： H01L23/433 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/367 , H01L25/10 , H01L25/18
CPC分类号： H01L23/4334 , H01L21/561 , H01L21/568 , H01L23/3121 , H01L23/3135 , H01L23/3675 , H01L24/24 , H01L24/25 , H01L25/105 , H01L25/18 , H01L2224/24175 , H01L2224/25171 , H01L2224/82005 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058
摘要： A semiconductor package includes a semiconductor die, a thermal conductive through via and a conductive paste. The thermal conductive through via is electrically insulated from the semiconductor die. The conductive paste is disposed over the semiconductor die, wherein the thermal conductive through via is thermally coupled to the semiconductor die through the conductive paste.
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公开(公告)号：US20240266334A1
公开(公告)日：2024-08-08
申请号：US18165772
申请日：2023-02-07
发明人： Ke-Gang Wen , Liang-Wei Wang , Dian-Hau Chen , Tsung-Chieh Hsiao
CPC分类号： H01L25/105 , H01L24/13 , H01L24/16 , H01L24/24 , H01L25/50 , H10B80/00 , H01L24/32 , H01L24/73 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16225 , H01L2224/24227 , H01L2224/32221 , H01L2224/73253 , H01L2225/1035 , H01L2225/1094
摘要： An integrated semiconductor device is provided. The integrated semiconductor device includes a first semiconductor structure having a first IC, and a second semiconductor structure stacked above the first semiconductor structure and having a second IC. The second semiconductor structure has a first surface facing the first semiconductor structure and a second surface facing away from the first semiconductor structure. The integrated semiconductor device also includes a thermal dissipation structure having a first portion partially through the first IC and a second portion fully through the second semiconductor structure and exposed at the second surface of the second semiconductor structure. The second portion may be outside of the second IC.
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公开(公告)号：US20240243090A1
公开(公告)日：2024-07-18
申请号：US18618133
申请日：2024-03-27
发明人： Jaekul LEE , Hyungsun JANG , Gayoung KIM , Minjeong SHIN
CPC分类号： H01L24/20 , H01L24/73 , H01L25/105 , H01L2224/2101 , H01L2224/2105 , H01L2224/221 , H01L2224/73101 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058
摘要： A semiconductor package includes a lower redistribution layer disposed on a lower surface of the semiconductor chip including an insulating layer, a redistribution pattern, a via, an under bump metal (UBM), and a post disposed on the redistribution pattern. The post vertically overlaps with the UBM. A mold layer is on the lower redistribution layer and surrounds the semiconductor chip. A connecting terminal is connected to the UBM. The UBM includes a first section contacting the redistribution pattern, and a second section contacting the insulating layer. The post has a ring shape having an inner surface and an outer surface when viewed in a top view. A maximum width of the inner surface is less than a maximum width of an upper surface of the first section. A maximum width of the outer surface is greater than the maximum width of the upper surface of the first section.
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公开(公告)号：US20240222251A1
公开(公告)日：2024-07-04
申请号：US18236664
申请日：2023-08-22
发明人： JIYOUNG LEE , JUNHYEONG PARK , JIHYE SHIM
IPC分类号： H01L23/498 , H01L21/48 , H01L23/00 , H01L25/065 , H01L25/10 , H01L25/18
CPC分类号： H01L23/49838 , H01L21/4857 , H01L23/49822 , H01L24/13 , H01L24/16 , H01L24/17 , H01L25/0657 , H01L25/105 , H01L25/18 , H01L24/05 , H01L24/06 , H01L2224/0557 , H01L2224/06181 , H01L2224/13082 , H01L2224/16145 , H01L2224/16227 , H01L2224/1703 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/1035 , H01L2225/1041
摘要： Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a first structure that includes a conductive pattern, a second structure spaced apart from the first structure, a pillar structure between the first structure and the second structure and electrically connecting the first structure to the second structure, and a semiconductor chip between the first structure and the second structure. The pillar structure includes an inner pillar on the conductive pattern and an outer pillar that surrounds the inner pillar. The outer pillar is in contact with a sidewall and a top surface of the inner pillar.
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