公开(公告)号：US20210134865A1

公开(公告)日：2021-05-06

申请号：US16848208

申请日：2020-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunsub Shim ,  Kyungho Lee ,  Sungsoo Choi

IPC: H01L27/146 ,  H04N5/378 ,  H04N5/3745 ,  H03M1/56

Abstract: An image sensor includes a pixel array including first pixels and second pixels, each of the first and second pixels including photodiodes, a sampling circuit detecting a reset voltage and a pixel voltage from the first and second pixels and generating an analog signal, an analog-to-digital converter image data from the analog signal, and a signal processing circuit generating an image using the image data. Each of the first pixels includes a first conductivity-type well separating the photodiodes and having impurities of a first conductivity-type. The photodiodes have impurities of a second conductivity-type different from the first conductivity-type. Each of the second pixels includes a second conductivity-type well separating the photodiodes and having impurities of the second conductivity-type different from the first conductivity-type. A potential level of the second conductivity-type well is higher than a potential level of the first conductivity-type well.

公开(公告)号：US10672817B2

公开(公告)日：2020-06-02

申请号：US16189008

申请日：2018-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungho Lee ,  Hyuk An ,  Hyuk Soon Choi

IPC: H01L27/146

Abstract: An image sensor includes a two-dimensional array of image sensor pixels, which are formed in a semiconductor layer. Each image sensor pixel is formed in a substrate having a corresponding semiconductor region therein. Each semiconductor region contains at least first and second photoelectric conversion elements, which are disposed at side-by-side locations therein. An electrically insulating isolation region is also provided, which extends at least partially through the semiconductor region and at least partially between the first and second photoelectric conversion elements, which may be configured respectively as first and second semiconductor regions of first conductivity type (e.g., N-type). At least one optically reflective region is also provided, which extends at least partially through the semiconductor region and surrounds at least a portion of at least one of the first and second photoelectric conversion elements. A semiconductor floating diffusion (FD) region (e.g., N-type region) is provided within the semiconductor region.

公开(公告)号：US10249666B2

公开(公告)日：2019-04-02

申请号：US15605076

申请日：2017-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghyung Pyo ,  BumSuk Kim ,  Kyungho Lee

IPC: H01L27/146

Abstract: Image sensors are provided. An image sensor includes a semiconductor substrate including a pixel region. The image sensor includes first and second photoelectric conversion elements in the pixel region. The image sensor includes an isolation region between the first and second photoelectric conversion elements. The isolation region is off-center with respect to the pixel region.

公开(公告)号：US20190096947A1

公开(公告)日：2019-03-28

申请号：US16189008

申请日：2018-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungho Lee ,  Hyuk An ,  Hyuk Soon Choi

IPC: H01L27/146

Abstract: An image sensor includes a two-dimensional array of image sensor pixels, which are formed in a semiconductor layer. Each image sensor pixel is formed in a substrate having a corresponding semiconductor region therein. Each semiconductor region contains at least first and second photoelectric conversion elements, which are disposed at side-by-side locations therein. An electrically insulating isolation region is also provided, which extends at least partially through the semiconductor region and at least partially between the first and second photoelectric conversion elements, which may be configured respectively as first and second semiconductor regions of first conductivity type (e.g., N-type). At least one optically reflective region is also provided, which extends at least partially through the semiconductor region and surrounds at least a portion of at least one of the first and second photoelectric conversion elements. A semiconductor floating diffusion (FD) region (e.g., N-type region) is provided within the semiconductor region.

公开(公告)号：US12191331B2

公开(公告)日：2025-01-07

申请号：US18319101

申请日：2023-05-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Masato Fujita ,  Yunki Lee ,  Eunsub Shim ,  Kyungho Lee ,  Bumsuk Kim ,  Taehan Kim

IPC: H01L27/146 ,  H04N25/59 ,  H04N25/704 ,  H04N25/709 ,  H04N25/772

Abstract: An image sensor includes a first photodiode group, a second photodiode group, a first transfer transistor group, a second transfer transistor group, a floating diffusion region of a substrate in which electric charges generated in the first photodiode group are stored, and a power supply node for applying a power supply voltage to the second photodiode group. A barrier voltage is applied to at least one transfer transistor of the second transfer transistor group. The power supply voltage allows electric charges, generated in the second photodiode group, to migrate to the power supply node, and the barrier voltage forms a potential barrier between the second photodiode group and the floating diffusion region.

公开(公告)号：US12176360B2

公开(公告)日：2024-12-24

申请号：US17501584

申请日：2021-10-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eunsub Shim ,  Kyungho Lee

IPC: H01L27/146

Abstract: An image sensor includes a pixel array including pixels, wherein each pixel includes at least one photodiode generating electrical charge and a pixel circuit providing a pixel signal based on the electrical charge. The images sensor also includes a logic circuit configured to generate an image based on the pixel signal, wherein the pixel circuit includes a parallel-connected first reset transistor and second reset transistor, and the logic circuit determines whether the second reset transistor is turned ON/OFF based on a level of incident light received by the at least one photodiode during an exposure time period.

公开(公告)号：US20240411467A1

公开(公告)日：2024-12-12

申请号：US18811955

申请日：2024-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongcheol Kim ,  Kiheung Kim ,  Taeyoung Oh ,  Kyungho Lee

IPC: G06F3/06

Abstract: A semiconductor memory device includes a memory cell array, a row hammer management circuit and a refresh control circuit. The row hammer management circuit automatically stores random count data in count cells of each of a plurality of memory cell rows during a power-up sequence of the semiconductor memory device and determines counted values by counting a number of times of access associated with each of the plurality of memory cell rows in response to an active command from an external memory controller and stores the counted values in the count cells of each of the plurality of memory cell rows as count data. The refresh control circuit receives a hammer address and performs a hammer refresh operation on one or more of the plurality of memory cell rows that are physically adjacent to a memory cell row that corresponds to the hammer address.

公开(公告)号：US12087791B2

公开(公告)日：2024-09-10

申请号：US18080904

申请日：2022-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunsub Shim ,  Kyungho Lee ,  Sungsoo Choi

IPC: H01L27/146 ,  H03M1/56 ,  H04N25/75 ,  H04N25/772

CPC classification number: H01L27/14616 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14638 ,  H01L27/14645 ,  H03M1/56 ,  H04N25/75 ,  H04N25/772

Abstract: An image sensor includes a pixel array including first pixels and second pixels, each of the first and second pixels including photodiodes, a sampling circuit detecting a reset voltage and a pixel voltage from the first and second pixels and generating an analog signal, an analog-to-digital converter image data from the analog signal, and a signal processing circuit generating an image using the image data. Each of the first pixels includes a first conductivity-type well separating the photodiodes and having impurities of a first conductivity-type. The photodiodes have impurities of a second conductivity-type different from the first conductivity-type. Each of the second pixels includes a second conductivity-type well separating the photodiodes and having impurities of the second conductivity-type different from the first conductivity-type. A potential level of the second conductivity-type well is higher than a potential level of the first conductivity-type well.

公开(公告)号：US11997403B2

公开(公告)日：2024-05-28

申请号：US17583504

申请日：2022-01-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taesub Jung ,  Kyungho Lee

IPC: H04N25/63 ,  H01L27/146 ,  H04N25/709 ,  H04N25/76

CPC classification number: H04N25/63 ,  H04N25/709 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14645 ,  H04N25/76

Abstract: An image sensor including: a pixel array including a plurality of pixels and a row driver configured to drive the pixel array, wherein each of the plurality of pixels includes at least one photodiode, a transmission transistor, a selection transistor, a device isolation structure, and a bulk area, and the row driver is configured to adjust, for each of preset periods, sizes and application timings of a negative voltage applied to the device isolation structure and a bulk control voltage applied to the bulk area while a first pixel is driven.

公开(公告)号：US20240038292A1

公开(公告)日：2024-02-01

申请号：US18357204

申请日：2023-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiheung Kim ,  Taeyoung Oh ,  Jongcheol Kim ,  Kyungho Lee ,  Hyongryol Hwang

IPC: G11C11/4078 ,  G11C11/4096 ,  G11C11/4076 ,  G11C11/406

CPC classification number: G11C11/4078 ,  G11C11/4096 ,  G11C11/4076 ,  G11C11/40622

Abstract: A semiconductor memory device includes a memory cell array including a plurality of memory cell rows, a row hammer management circuit and a control logic circuit. The row hammer management circuit stores counted values in count cells of each of the plurality of memory cell rows as count data based on an active command applied to the control logic circuit at a first time point, and performs an internal read-update-write operation to read the count data from the count cells of a target memory cell row from among the plurality of memory cell rows, to update the count data that was read to obtain updated count data, and to write the updated count data in the count cells of the target memory cell row in response to a precharge command applied at a second time point after a first command that is applied to the control logic circuit.