公开(公告)号：US11626348B2

公开(公告)日：2023-04-11

申请号：US17075141

申请日：2020-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Ho Do ,  Tae-Joong Song ,  Seung-Young Lee ,  Jong-Hoon Jung

IPC: H01L23/48 ,  H01L23/482 ,  H01L27/02 ,  H01L27/118 ,  H01L23/485 ,  H01L21/768 ,  G06F30/394 ,  G06F30/392

Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.

公开(公告)号：US20210013149A1

公开(公告)日：2021-01-14

申请号：US17037569

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Boong Lee ,  Jung-Ho Do ,  Tae-Joong Song ,  Seung-Young Lee ,  Jong-Hoon Jung ,  Ji-Su Yu

IPC: H01L23/528 ,  H01L27/02 ,  H01L23/522 ,  H01L21/8234 ,  H01L27/118 ,  G06F30/327 ,  G06F30/394

Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.

公开(公告)号：US10790305B2

公开(公告)日：2020-09-29

申请号：US16409129

申请日：2019-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho Do ,  Ji-Su Yu ,  Hyeon-gyu You ,  Seung-Young Lee ,  Jae-Boong Lee ,  Jong-Hoon Jung

IPC: H01L23/52 ,  H01L27/118 ,  H01L27/02

Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.

公开(公告)号：US10726186B2

公开(公告)日：2020-07-28

申请号：US15585548

申请日：2017-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Tae Kim ,  Jung-Ho Do ,  Tae-Joong Song ,  Doo-Hee Cho ,  Seung-Young Lee

IPC: G06F30/00 ,  G06F30/394 ,  G06F30/392

Abstract: A method of designing an integrated circuit includes receiving input data defining the integrated circuit, receiving information from a standard cell library including a plurality of standard cells, receiving information from a modified cell library including at least one modified cell having a same function as a corresponding standard cell among the plurality of standard cells and having a higher routability than the corresponding standard cell and generating output data by performing placement and routing in response to the input data, the information from the standard cell library and the information from the modified cell library.

公开(公告)号：US10050032B2

公开(公告)日：2018-08-14

申请号：US15416016

申请日：2017-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Hoon Baek ,  Sun-Young Park ,  Sang-Kyu Oh ,  Ha-Young Kim ,  Jung-Ho Do ,  Moo-Gyu Bae ,  Seung-Young Lee

IPC: H01L23/48 ,  H01L29/40 ,  H01L27/088 ,  H01L23/528 ,  H01L27/02 ,  H01L27/11 ,  H01L21/8234

Abstract: Systems on chips are provided. A system on chip (SoC) includes a first gate line, a second gate line and a third gate line extending in a first direction, a gate isolation region cutting the first gate line, the second gate line and the third gate line and extending in a second direction across the first direction, a first gate contact formed on the second gate line arranged between the first gate line and the third gate line, and electrically connecting the cut second gate line, a second gate contact formed on the first gate line, a third gate contact formed on the third gate line, a first metal line electrically connecting the second gate contact and the third gate contact, and a second metal line electrically connected to the first gate contact.

公开(公告)号：US20180173835A1

公开(公告)日：2018-06-21

申请号：US15689008

申请日：2017-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-HO DO ,  Jong-Hoon Jung ,  Seung-Young Lee ,  Tae-Joong Song

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G03F1/70 ,  G03F7/70283 ,  G03F7/70466 ,  G06F17/5009 ,  G06F17/5068 ,  G06F17/5081

Abstract: An integrated circuit includes: a lower layer including first and second lower patterns extending in a first direction; a first via arranged on the first lower pattern, and a second via arranged on the second lower pattern; a first upper pattern arranged on the first via; and a second upper pattern arranged on the second via, a first color is assigned to the first upper pattern, a second color is assigned to the second upper pattern, the first and second upper patterns are adjacent to each other in a second direction, and the first via is arranged in a first edge region of the first lower pattern, the first edge region being farther away from the second lower pattern than a second edge region of the first lower pattern, the second edge region being opposite to the first edge region.