公开(公告)号：US20150194332A1

公开(公告)日：2015-07-09

申请号：US14641958

申请日：2015-03-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-IL CHANG ,  Young-Woo Park

IPC: H01L21/764 ,  H01L29/792 ,  H01L27/115 ,  H01L21/762

CPC classification number: H01L21/764 ,  H01L21/76224 ,  H01L27/11563 ,  H01L27/11568 ,  H01L29/792

Abstract: A non-volatile memory device includes a substrate having an active region defined by a device isolation region that has a trench and an air gap, a device isolation pattern positioned at a lower portion of the trench, a memory cell layer including a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the active region and one of which extends from the active region toward the device isolation region encloses top of the air gap whose bottom is defined by a layer other than that of the top, and a control gate electrode positioned on the cell structure. The one of the insulation layer extending includes a recess at a region corresponding to the center of the air gap.

Abstract translation: 非易失性存储器件包括具有由具有沟槽和气隙的器件隔离区限定的有源区的衬底，位于沟槽下部的器件隔离图案，包括隧道绝缘层的存储单元层 ，顺序堆叠在有源区上并且其中一个从有源区向器件隔离区延伸的陷阱绝缘层和阻挡绝缘层包围气隙的顶部，其底部由不同于 顶部和位于电池结构上的控制栅电极。 绝缘层延伸的一个包括在对应于气隙的中心的区域处的凹部。

公开(公告)号：US08829667B2

公开(公告)日：2014-09-09

申请号：US13968731

申请日：2013-08-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Woo Park ,  Wang-Ju Lee ,  In-Sang Song

IPC: H01L23/552 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L23/3128 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic apparatus includes a main board, a semiconductor package, an upper conductive EMI shield member, and a lower conductive EMI shield member. The main board includes a first ground pad. The semiconductor package is spaced apart from and electrically connected to the main board. The upper conductive EMI shield member covers a top surface and a sidewall of the semiconductor package. The lower conductive EMI shield member surrounds a space between the main board and the semiconductor package, and is electrically connected to the upper conductive EMI shield member and the first ground pad.

Abstract translation: 电子设备包括主板，半导体封装，上导电EMI屏蔽构件和下导电EMI屏蔽构件。 主板包括第一接地垫。 半导体封装与主板间隔开并电连接到主板。 上导电EMI屏蔽构件覆盖半导体封装的顶表面和侧壁。 下导电EMI屏蔽构件围绕主板和半导体封装之间的空间，并且电连接到上导电EMI屏蔽构件和第一接地垫。

公开(公告)号：US20140048913A1

公开(公告)日：2014-02-20

申请号：US13968731

申请日：2013-08-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Woo Park ,  Wang-Ju Lee ,  In-Sang Song

IPC: H01L23/552

CPC classification number: H01L23/552 ,  H01L23/3128 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic apparatus includes a main board, a semiconductor package, an upper conductive EMI shield member, and a lower conductive EMI shield member. The main board includes a first ground pad. The semiconductor package is spaced apart from and electrically connected to the main board. The upper conductive EMI shield member covers a top surface and a sidewall of the semiconductor package. The lower conductive EMI shield member surrounds a space between the main board and the semiconductor package, and is electrically connected to the upper conductive EMI shield member and the first ground pad.

Abstract translation: 电子设备包括主板，半导体封装，上导电EMI屏蔽构件和下导电EMI屏蔽构件。 主板包括第一接地垫。 半导体封装与主板间隔开并电连接到主板。 上导电EMI屏蔽构件覆盖半导体封装的顶表面和侧壁。 下导电EMI屏蔽构件围绕主板和半导体封装之间的空间，并且电连接到上导电EMI屏蔽构件和第一接地垫。