公开(公告)号：US10777575B1

公开(公告)日：2020-09-15

申请号：US16361722

申请日：2019-03-22

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui ,  Kiyohiko Sakakibara ,  Yanli Zhang

IPC: H01L27/11582 ,  H01L27/11573 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11575

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures extending through the alternating stack, drain-select-level trenches that vertically extend through at least one drain-select-level electrically conductive layer and laterally extend along a first horizontal direction and divide each drain-select-level electrically conductive layer into multiple drain-select-level electrically conductive strips, and pairs of vertical conductive strips located within a respective one of the drain-select-level trenches. Each of the vertical conductive strips has a pair of vertical straight sidewalls that laterally extends along the first horizontal direction. Each drain-select-level electrode may have at least one drain-select-level electrically conductive layer and at least one vertical conductive strip.

公开(公告)号：US20190280002A1

公开(公告)日：2019-09-12

申请号：US16020739

申请日：2018-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： James Kai ,  Zhixin Cui ,  Murshed Chowdhury ,  Johann Alsmeier ,  Tong Zhang

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/1157 ,  H01L27/11573 ,  H01L21/28 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522

Abstract: A first-tier structure including a first alternating stack of first insulating layers and first spacer material layers is formed over a substrate. First-tier memory openings and at least one type of first-tier contact openings can be formed simultaneously employing a same anisotropic etch process. The first-tier contact openings formed over stepped surfaces of the first alternating stack may extend through the first alternating stack, or may stop on the stepped surfaces. Sacrificial first-tier opening fill portions are formed in the first-tier openings, and a second-tier structure can be formed over the first-tier structure. Memory openings including volumes of the first-tier memory openings are formed through the multi-tier structure, and memory stack structures are formed in the memory openings. Various contact openings are formed through the multi-tier structure, and various contact via structures are formed in the contact openings.

公开(公告)号：US10388666B1

公开(公告)日：2019-08-20

申请号：US16020739

申请日：2018-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： James Kai ,  Zhixin Cui ,  Murshed Chowdhury ,  Johann Alsmeier ,  Tong Zhang

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/1157 ,  H01L23/522 ,  H01L21/28 ,  H01L21/768 ,  H01L23/528 ,  H01L27/11573

Abstract: A first-tier structure including a first alternating stack of first insulating layers and first spacer material layers is formed over a substrate. First-tier memory openings and at least one type of first-tier contact openings can be formed simultaneously employing a same anisotropic etch process. The first-tier contact openings formed over stepped surfaces of the first alternating stack may extend through the first alternating stack, or may stop on the stepped surfaces. Sacrificial first-tier opening fill portions are formed in the first-tier openings, and a second-tier structure can be formed over the first-tier structure. Memory openings including volumes of the first-tier memory openings are formed through the multi-tier structure, and memory stack structures are formed in the memory openings. Various contact openings are formed through the multi-tier structure, and various contact via structures are formed in the contact openings.

公开(公告)号：US10381362B1

公开(公告)日：2019-08-13

申请号：US15979885

申请日：2018-05-15

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui ,  Keisuke Izumi ,  Tomohiro Kubo

IPC: H01L27/115 ,  H01L27/11548 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11575 ,  H01L21/768

Abstract: A three-dimensional memory device includes field effect transistors located on a substrate, lower metal interconnect structures embedded in first dielectric layers and located over the substrate, a source line located over the first dielectric layers, a stepped dielectric material portion located over the first dielectric layers and including stepped surfaces, an alternating stack of insulating layers and electrically conductive layers located over the source line and contacting the stepped surfaces of the stepped dielectric material portion, and memory stack structures extending through the alternating stack and including a memory film and a vertical semiconductor channel. A lateral extent of the stepped dielectric material portion decreases stepwise with a vertical distance from the substrate, and lateral extents of the electrically conductive layers increase with a vertical distance from the source line.

公开(公告)号：US09853038B1

公开(公告)日：2017-12-26

申请号：US15411126

申请日：2017-01-20

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui

IPC: H01L27/115 ,  H01L27/11556 ,  H01L27/11524 ,  H01L27/11582 ,  H01L27/1157

CPC classification number: H01L27/1157 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582

Abstract: Memory openings and support openings are formed through an alternating stack of insulating layers and sacrificial material layers over a substrate. The support openings are laterally expanded by laterally recessing the insulating layers with respect to the sacrificial material layers. The laterally expanded support openings are filled with a combination of a dielectric material and a sacrificial fill material to form support pillar structures. After forming memory films and channels in the memory openings, the sacrificial material layers are replaced with electrically conductive layers while the support pillar structures provide structural support to the insulating layers. The sacrificial fill material is replaced with contact via structures to form integrated support and contact structures.

公开(公告)号：US12010835B2

公开(公告)日：2024-06-11

申请号：US17241321

申请日：2021-04-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui ,  Satoshi Shimizu

IPC: H10B41/27 ,  G11C8/14 ,  H10B41/10 ,  H10B43/10 ,  H10B43/27

CPC classification number: H10B41/27 ,  G11C8/14 ,  H10B41/10 ,  H10B43/10 ,  H10B43/27

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, memory opening fill structures vertically extending through the alternating stack in a memory array region, and an electrically conductive spacer extending vertically and electrically connecting a first drain-select-level electrically conductive layer to a second drain-select-level electrically conductive layer.

公开(公告)号：US11621277B2

公开(公告)日：2023-04-04

申请号：US17098743

申请日：2020-11-16

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Monica Titus ,  Zhixin Cui ,  Senaka Kanakamedala ,  Yao-Sheng Lee ,  Chih-Yu Lee

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11575

Abstract: A joint level dielectric material layer is formed over a first alternating stack of first insulating layers and first spacer material layers. A first memory opening is formed with a tapered sidewall of the joint level dielectric material layer. A second alternating stack of second insulating layers and second spacer material layers is formed over the joint level dielectric material layer. An inter-tier memory opening is formed, which includes a volume of an second memory opening that extends through the second alternating stack and a volume of the first memory opening. A memory film and a semiconductor channel are formed in the inter-tier memory opening with respective tapered portions overlying the tapered sidewall of the joint level dielectric material layer.

公开(公告)号：US11552100B2

公开(公告)日：2023-01-10

申请号：US16985340

申请日：2020-08-05

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui ,  Satoshi Shimizu ,  Yanli Zhang

IPC: H01L27/11582 ,  G11C8/14 ,  H01L27/1157 ,  H01L23/522 ,  H01L27/11565

Abstract: A three-dimensional memory device includes a source contact layer overlying a substrate, an alternating stack of insulating layers and electrically conductive layers located overlying the source contact layer, and a memory opening fill structure located within a memory opening extending through the alternating stack and the source contact layer. The memory opening fill structure includes a composite semiconductor channel and a memory film laterally surrounding the composite semiconductor channel. The composite semiconductor channel includes a pedestal channel portion having controlled distribution of n-type dopants that diffuse from the source contact layer with a lower diffusion rate provided by carbon doping and smaller grain sizes, or has arsenic doping providing limited diffusion into the vertical semiconductor channel. The vertical semiconductor channel has large grain sizes to provide high charge carrier mobility, and is free of or includes only a low concentration of carbon atoms and n-type dopants therein.

公开(公告)号：US11515326B2

公开(公告)日：2022-11-29

申请号：US17192668

申请日：2021-03-04

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui ,  Tatsuya Hinoue

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11524 ,  H01L27/11565

Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory material layer. A vertical stack of insulating material portions can be provided at levels of the insulating layers to provide a laterally-undulating profile to the memory material layer. Alternatively, a combination of inner insulating spacers and outer insulating spacers can be employed to provide a laterally-undulating profile to the memory material layer.

公开(公告)号：US11302714B2

公开(公告)日：2022-04-12

申请号：US16985388

申请日：2020-08-05

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Zhixin Cui ,  Satoshi Shimizu ,  Yanli Zhang

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11565 ,  H01L21/3213 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11556

Abstract: A three-dimensional memory device includes a source contact layer overlying a substrate, an alternating stack of insulating layers and electrically conductive layers located overlying the source contact layer, and a memory opening fill structure located within a memory opening extending through the alternating stack and the source contact layer. The memory opening fill structure includes a composite semiconductor channel and a memory film laterally surrounding the composite semiconductor channel. The composite semiconductor channel includes a pedestal channel portion having controlled distribution of n-type dopants that diffuse from the source contact layer with a lower diffusion rate provided by carbon doping and smaller grain sizes, or has arsenic doping providing limited diffusion into the vertical semiconductor channel. The vertical semiconductor channel has large grain sizes to provide high charge carrier mobility, and is free of or includes only a low concentration of carbon atoms and n-type dopants therein.