Method and apparatus for a multi-antenna device that uses a single baseband filter and analog-to-digital converter
    21.
    发明授权
    Method and apparatus for a multi-antenna device that uses a single baseband filter and analog-to-digital converter 有权
    用于使用单个基带滤波器和模数转换器的多天线装置的方法和装置

    公开(公告)号:US08798103B2

    公开(公告)日:2014-08-05

    申请号:US13288212

    申请日:2011-11-03

    IPC分类号: H04J3/04

    CPC分类号: H04B1/0064 H04B7/0837

    摘要: A multi-antenna device (200) comprising a set of antennas (210-214), a set of receivers (220-224), a multiplexer (270), a baseband filter (242), an analog-to-digital converter (244), and a de-multiplexer (272). The receivers (220-224) can be linked to the antennas (210-214) in a one-to-one manner. The multiplexer (270) can generate a composite analog signal from a set of different analog signals, one received from different ones of the antennas (210-214). The baseband filter (242) can filter the composite analog signal. The analog-to-digital converter (244) can convert the composite analog signal after being filtered by the baseband filter into a composite digital signal. The de-multiplexer (272) can generate a set of different digital signals from the composite digital signal. Each of the different digital signals can correspond to one of the different analog signals in a one-to-one manner.

    摘要翻译: 一种多天线设备(200),包括一组天线(210-214),一组接收机(220-224),多路复用器(270),基带滤波器(242),模数转换器 244)和解复用器(272)。 接收器(220-224)可以以一对一的方式链接到天线(210-214)。 多路复用器(270)可以从一组不同的模拟信号中产生一个复合模拟信号,一组从不同的天线(210-214)接收。 基带滤波器(242)可以对复合模拟信号进行滤波。 模数转换器(244)可以将由基带滤波器滤波后的复合模拟信号转换为复合数字信号。 解复用器(272)可以从复合数字信号产生一组不同的数字信号。 每个不同的数字信号可以以一对一的方式对应于不同的模拟信号之一。

    Method and system for managing digital to time conversion
    22.
    发明授权
    Method and system for managing digital to time conversion 有权
    用于管理数字到时间转换的方法和系统

    公开(公告)号:US08339295B2

    公开(公告)日:2012-12-25

    申请号:US11831465

    申请日:2007-07-31

    IPC分类号: H03M1/48

    CPC分类号: H03B21/02 H03L7/0814

    摘要: A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.

    摘要翻译: 提供了一种用于管理数字到时间转换(DTC)的方法和系统。 该方法包括接收第一射频(RF)信号和第二RF信号。 第二RF信号是相移的第一RF信号。 该方法还包括将第一RF信号转换为第一中频(IF)信号,将第二RF信号转换为第二IF信号。 此外,基于时差测量技术来估计第一IF信号与第二IF信号之间的时间延迟。 基于估计的时间延迟来处理第二RF信号以补偿与第二RF信号相关联的延迟误差。

    Device and method for phase compensation
    23.
    发明授权
    Device and method for phase compensation 有权
    相位补偿装置及方法

    公开(公告)号:US08154329B2

    公开(公告)日:2012-04-10

    申请号:US12650649

    申请日:2009-12-31

    IPC分类号: H03L7/06

    CPC分类号: H03L7/1974

    摘要: A frequency generation unit is provided that permits a receiver to tune from channel to channel without cycle skipping and in which compensation for phase offset introduced during tuning is provided. The frequency generation unit includes a fractional-N synthesizer, a voltage controlled oscillator (VCO), and a direct digital synthesizer (DDS). The fractional-N synthesizer generates frequencies from the VCO as well as a temperature controlled crystal oscillator. Outputs from the fractional-N synthesizer are supplied both the VCO and the DDS to control the VCO and DDS. The combination of the voltage controlled oscillator and fractional-N synthesizer is perpetually locked. The fractional-N synthesizer is maintained in a locked condition. The VCO output is provided to the DDS. An output from the DDS or from the fractional-N synthesizer forms the output signal of the frequency generation unit.

    摘要翻译: 提供了频率产生单元,其允许接收器在没有周期跳过的情况下从信道调谐到信道,并且在提供在调谐期间引入的相位偏移补偿。 频率产生单元包括分数N合成器,压控振荡器(VCO)和直接数字合成器(DDS)。 分数N合成器从VCO产生频率以及温度控制的晶体振荡器。 来自分数N合成器的输出都由VCO和DDS提供,以控制VCO和DDS。 压控振荡器和分数N合成器的组合永久锁定。 分数N合成器保持在锁定状态。 VCO输出提供给DDS。 来自DDS或分数N合成器的输出形成频率产生单元的输出信号。

    Method and apparatus for processing radio frequency signals
    24.
    发明授权
    Method and apparatus for processing radio frequency signals 有权
    用于处理射频信号的方法和装置

    公开(公告)号:US08121241B2

    公开(公告)日:2012-02-21

    申请号:US12241005

    申请日:2008-09-29

    IPC分类号: H04L7/00

    CPC分类号: H04B1/28 H03D7/166

    摘要: A method and apparatus for processing a radio frequency (RF) signal is provided. The method includes generating a periodic square wave local oscillator (LO) signal of a first phase, a periodic square wave LO signal of a second phase, and a chopping signal. The method further includes coding the periodic square wave LO signal of the first phase and the periodic square wave LO signal of the second phase synchronously with the chopping signal to generate a first set of synchronized signals (116, 118) and a second set of synchronized signals (120, 122), respectively. A phase difference between the first phase and the second phase is a predefined value. The RF signal is processed with the first set of synchronized signals (116, 118) and the second set of synchronized signals (120, 122) to obtain an in-phase intermediate frequency (IF) signal (132) and a quadrature-phase IF signal (142), respectively.

    摘要翻译: 提供了一种用于处理射频(RF)信号的方法和装置。 该方法包括产生第一相的周期性方波本地振荡器(LO)信号,第二相的周期性方波LO信号和斩波信号。 该方法还包括与斩波信号同步地编码第一阶段的周期性方波LO信号和第二相周期性方波LO信号,以产生第一组同步信号(116,118)和第二组同步信号 信号(120,122)。 第一相和第二相之间的相位差是预定义的值。 RF信号用第一组同步信号(116,118)和第二组同步信号(120,122)进行处理,以获得同相中频(IF)信号(132)和正交相位IF 信号(142)。

    METHOD AND APPARATUS FOR PROCESSING RADIO FREQUENCY SIGNALS
    25.
    发明申请
    METHOD AND APPARATUS FOR PROCESSING RADIO FREQUENCY SIGNALS 有权
    用于处理无线电频率信号的方法和装置

    公开(公告)号:US20100080333A1

    公开(公告)日:2010-04-01

    申请号:US12241005

    申请日:2008-09-29

    IPC分类号: H04L7/00

    CPC分类号: H04B1/28 H03D7/166

    摘要: A method and apparatus for processing a radio frequency (RF) signal is provided. The method includes generating a periodic square wave local oscillator (LO) signal of a first phase, a periodic square wave LO signal of a second phase, and a chopping signal. The method further includes coding the periodic square wave LO signal of the first phase and the periodic square wave LO signal of the second phase synchronously with the chopping signal to generate a first set of synchronized signals (116, 118) and a second set of synchronized signals (120, 122), respectively. A phase difference between the first phase and the second phase is a predefined value. The RF signal is processed with the first set of synchronized signals (116, 118) and the second set of synchronized signals (120, 122) to obtain an in-phase intermediate frequency (IF) signal (132) and a quadrature-phase IF signal (142), respectively.

    摘要翻译: 提供了一种用于处理射频(RF)信号的方法和装置。 该方法包括产生第一相的周期性方波本地振荡器(LO)信号,第二相的周期性方波LO信号和斩波信号。 该方法还包括与斩波信号同步地编码第一阶段的周期性方波LO信号和第二相周期性方波LO信号,以产生第一组同步信号(116,118)和第二组同步信号 信号(120,122)。 第一相和第二相之间的相位差是预定义的值。 RF信号用第一组同步信号(116,118)和第二组同步信号(120,122)进行处理,以获得同相中频(IF)信号(132)和正交相位IF 信号(142)。

    METHOD AND SYSTEM FOR MANAGING DIGITAL TO TIME CONVERSION
    26.
    发明申请
    METHOD AND SYSTEM FOR MANAGING DIGITAL TO TIME CONVERSION 有权
    用于管理数字到时间转换的方法和系统

    公开(公告)号:US20090033384A1

    公开(公告)日:2009-02-05

    申请号:US11831465

    申请日:2007-07-31

    IPC分类号: H03L7/06

    CPC分类号: H03B21/02 H03L7/0814

    摘要: A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.

    摘要翻译: 提供了一种用于管理数字到时间转换(DTC)的方法和系统。 该方法包括接收第一射频(RF)信号和第二RF信号。 第二RF信号是相移的第一RF信号。 该方法还包括将第一RF信号转换为第一中频(IF)信号,将第二RF信号转换为第二IF信号。 此外,基于时差测量技术来估计第一IF信号和第二IF信号之间的时间延迟。 基于估计的时间延迟来处理第二RF信号以补偿与第二RF信号相关联的延迟误差。

    Amplifier containing programmable impedance for harmonic termination
    27.
    发明授权
    Amplifier containing programmable impedance for harmonic termination 有权
    包含用于谐波终端的可编程阻抗的放大器

    公开(公告)号:US07471156B2

    公开(公告)日:2008-12-30

    申请号:US11537231

    申请日:2006-09-29

    IPC分类号: H03F3/45

    摘要: An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.

    摘要翻译: 提出了用于消除平衡放大器电路中不需要的信号功率耗散并且用于禁止在平衡放大器负载处出现不想要的信号功率的装置和方法。 放大器功率输出晶体管的负载阻抗在不需要的频率下保持非常低,并且在基频处于工作阻抗级。 提出了阻抗网络控制概念,可以手动或自动实现。

    AMPLIFIER CONTAINING PROGRAMMABLE IMPEDANCE FOR HARMONIC TERMINATION
    28.
    发明申请
    AMPLIFIER CONTAINING PROGRAMMABLE IMPEDANCE FOR HARMONIC TERMINATION 有权
    包含可编程阻抗的放大器用于谐波终止

    公开(公告)号:US20080079496A1

    公开(公告)日:2008-04-03

    申请号:US11537231

    申请日:2006-09-29

    IPC分类号: H03F3/45

    摘要: An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.

    摘要翻译: 提出了用于消除平衡放大器电路中不需要的信号功率耗散并且用于禁止在平衡放大器负载处出现不想要的信号功率的装置和方法。 放大器功率输出晶体管的负载阻抗在不需要的频率下保持非常低,并且在基频处于工作阻抗级。 提出了阻抗网络控制概念,可以手动或自动实现。

    System and method for providing an input to a distributed power amplifying system
    29.
    发明授权
    System and method for providing an input to a distributed power amplifying system 有权
    用于向分布式功率放大系统提供输入的系统和方法

    公开(公告)号:US07233207B2

    公开(公告)日:2007-06-19

    申请号:US11123309

    申请日:2005-05-06

    IPC分类号: H03F3/60

    CPC分类号: H03F3/605

    摘要: A system and a method for providing an input to a distributed power amplifying system are provided. In an embodiment, a distributed power amplifying system includes a plurality of amplifying sections (102, 104, 106, and 108) and a plurality of drivers (110, 112, 114, and 116). Each of the plurality of drivers receives a common transmit signal (118) and an individual control signal (120, 122, 124, and 126). Each of the plurality of drivers independently preconditions the common transmit signal, to provide a transmit output signal (128, 130, 132, and 134) to each of the plurality of amplifying sections. The common transmit signal provided to each of the plurality of drivers is preconditioned, based on the individual control signal.

    摘要翻译: 提供了一种用于向分布式功率放大系统提供输入的系统和方法。 在一个实施例中,分布式功率放大系统包括多个放大部分(102,104,106和108)和多个驱动器(110,112,114和116)。 多个驱动器中的每个驱动器接收公共发送信号(118)和单独的控制信号(120,122,124和126)。 所述多个驱动器中的每个驱动器独立地对所述公共发送信号进行预处理,以向所述多个放大部分中的每一个提供发送输出信号(128,130,132和134)。 提供给多个驱动器中的每一个的公共发送信号基于各个控制信号进行预处理。

    Cascaded delay locked loop circuit
    30.
    发明授权
    Cascaded delay locked loop circuit 有权
    级联延迟锁定环路

    公开(公告)号:US07154978B2

    公开(公告)日:2006-12-26

    申请号:US10000914

    申请日:2001-11-02

    IPC分类号: H03D3/24

    摘要: A delay locked loop frequency synthesizer in several embodiments uses a primary delay line element (24) and one or more secondary delay elements (162 . . . 164, 270, 310). In one embodiment, a main delay line (24) is used to coarsely select a frequency output while a secondary delay element (162 . . . 164, 270, 310), either passive or active, is used to increase the resolution of the primary delay line (24). In the passive embodiment, a coarse and fine frequency selection is possible by selecting components from the output taps of the main delay line (24) as a driving signal for the passive secondary delay element (310) to provide the coarse adjustment and selecting an output from the secondary delay element (310) to provide the fine selection.

    摘要翻译: 在几个实施例中,延迟锁定环频率合成器使用主延迟线元件(24)和一个或多个辅助延迟元件(162 ... 164,270,310)。 在一个实施例中,主延迟线(24)用于粗略地选择频率输出,而使用无源或有源的辅助延迟元件(162 ... 164,270,310)来增加初级 延迟线(24)。 在被动实施例中,通过从主延迟线(24)的输出抽头中选择分量作为被动次级延迟元件(310)的驱动信号来提供粗调和选择输出,可以进行粗略和精细的频率选择 从第二延迟元件(310)提供精细选择。