摘要:
A multi-antenna device (200) comprising a set of antennas (210-214), a set of receivers (220-224), a multiplexer (270), a baseband filter (242), an analog-to-digital converter (244), and a de-multiplexer (272). The receivers (220-224) can be linked to the antennas (210-214) in a one-to-one manner. The multiplexer (270) can generate a composite analog signal from a set of different analog signals, one received from different ones of the antennas (210-214). The baseband filter (242) can filter the composite analog signal. The analog-to-digital converter (244) can convert the composite analog signal after being filtered by the baseband filter into a composite digital signal. The de-multiplexer (272) can generate a set of different digital signals from the composite digital signal. Each of the different digital signals can correspond to one of the different analog signals in a one-to-one manner.
摘要:
A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.
摘要:
A frequency generation unit is provided that permits a receiver to tune from channel to channel without cycle skipping and in which compensation for phase offset introduced during tuning is provided. The frequency generation unit includes a fractional-N synthesizer, a voltage controlled oscillator (VCO), and a direct digital synthesizer (DDS). The fractional-N synthesizer generates frequencies from the VCO as well as a temperature controlled crystal oscillator. Outputs from the fractional-N synthesizer are supplied both the VCO and the DDS to control the VCO and DDS. The combination of the voltage controlled oscillator and fractional-N synthesizer is perpetually locked. The fractional-N synthesizer is maintained in a locked condition. The VCO output is provided to the DDS. An output from the DDS or from the fractional-N synthesizer forms the output signal of the frequency generation unit.
摘要:
A method and apparatus for processing a radio frequency (RF) signal is provided. The method includes generating a periodic square wave local oscillator (LO) signal of a first phase, a periodic square wave LO signal of a second phase, and a chopping signal. The method further includes coding the periodic square wave LO signal of the first phase and the periodic square wave LO signal of the second phase synchronously with the chopping signal to generate a first set of synchronized signals (116, 118) and a second set of synchronized signals (120, 122), respectively. A phase difference between the first phase and the second phase is a predefined value. The RF signal is processed with the first set of synchronized signals (116, 118) and the second set of synchronized signals (120, 122) to obtain an in-phase intermediate frequency (IF) signal (132) and a quadrature-phase IF signal (142), respectively.
摘要:
A method and apparatus for processing a radio frequency (RF) signal is provided. The method includes generating a periodic square wave local oscillator (LO) signal of a first phase, a periodic square wave LO signal of a second phase, and a chopping signal. The method further includes coding the periodic square wave LO signal of the first phase and the periodic square wave LO signal of the second phase synchronously with the chopping signal to generate a first set of synchronized signals (116, 118) and a second set of synchronized signals (120, 122), respectively. A phase difference between the first phase and the second phase is a predefined value. The RF signal is processed with the first set of synchronized signals (116, 118) and the second set of synchronized signals (120, 122) to obtain an in-phase intermediate frequency (IF) signal (132) and a quadrature-phase IF signal (142), respectively.
摘要:
A method and system for managing Digital to Time Conversion (DTC) is provided. The method comprises receiving a first Radio Frequency (RF) signal and a second RF signal. The second RF signal is a phase-shifted first RF signal. The method further comprises converting the first RF signal to a first Intermediate Frequency (IF) signal and the second RF signal to a second IF signal. Further, a time delay between the first IF signal and the second IF signal is estimated based on a time difference measurement technique. The second RF signal is processed based on the estimated time delay to compensate for a delay error associated with the second RF signal.
摘要:
An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.
摘要:
An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.
摘要:
A system and a method for providing an input to a distributed power amplifying system are provided. In an embodiment, a distributed power amplifying system includes a plurality of amplifying sections (102, 104, 106, and 108) and a plurality of drivers (110, 112, 114, and 116). Each of the plurality of drivers receives a common transmit signal (118) and an individual control signal (120, 122, 124, and 126). Each of the plurality of drivers independently preconditions the common transmit signal, to provide a transmit output signal (128, 130, 132, and 134) to each of the plurality of amplifying sections. The common transmit signal provided to each of the plurality of drivers is preconditioned, based on the individual control signal.
摘要:
A delay locked loop frequency synthesizer in several embodiments uses a primary delay line element (24) and one or more secondary delay elements (162 . . . 164, 270, 310). In one embodiment, a main delay line (24) is used to coarsely select a frequency output while a secondary delay element (162 . . . 164, 270, 310), either passive or active, is used to increase the resolution of the primary delay line (24). In the passive embodiment, a coarse and fine frequency selection is possible by selecting components from the output taps of the main delay line (24) as a driving signal for the passive secondary delay element (310) to provide the coarse adjustment and selecting an output from the secondary delay element (310) to provide the fine selection.