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公开(公告)号：US07471156B2
公开(公告)日：2008-12-30
申请号：US11537231
申请日：2006-09-29
IPC分类号： H03F3/45
CPC分类号： H03F3/4508 , H03F1/565 , H03F3/26 , H03F3/602 , H03F2200/387 , H03F2200/451 , H03F2203/45394 , H03F2203/45731
摘要： An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.
摘要翻译： 提出了用于消除平衡放大器电路中不需要的信号功率耗散并且用于禁止在平衡放大器负载处出现不想要的信号功率的装置和方法。 放大器功率输出晶体管的负载阻抗在不需要的频率下保持非常低，并且在基频处于工作阻抗级。 提出了阻抗网络控制概念，可以手动或自动实现。
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公开(公告)号：US20080079496A1
公开(公告)日：2008-04-03
申请号：US11537231
申请日：2006-09-29
IPC分类号： H03F3/45
CPC分类号： H03F3/4508 , H03F1/565 , H03F3/26 , H03F3/602 , H03F2200/387 , H03F2200/451 , H03F2203/45394 , H03F2203/45731
摘要： An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.
摘要翻译： 提出了用于消除平衡放大器电路中不需要的信号功率耗散并且用于禁止在平衡放大器负载处出现不想要的信号功率的装置和方法。 放大器功率输出晶体管的负载阻抗在不需要的频率下保持非常低，并且在基频处于工作阻抗级。 提出了阻抗网络控制概念，可以手动或自动实现。
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3.发明授权System and method for providing an input to a distributed power amplifying system 有权用于向分布式功率放大系统提供输入的系统和方法公开(公告)号：US07233207B2
公开(公告)日：2007-06-19
申请号：US11123309
申请日：2005-05-06
IPC分类号： H03F3/60
CPC分类号： H03F3/605
摘要： A system and a method for providing an input to a distributed power amplifying system are provided. In an embodiment, a distributed power amplifying system includes a plurality of amplifying sections (102, 104, 106, and 108) and a plurality of drivers (110, 112, 114, and 116). Each of the plurality of drivers receives a common transmit signal (118) and an individual control signal (120, 122, 124, and 126). Each of the plurality of drivers independently preconditions the common transmit signal, to provide a transmit output signal (128, 130, 132, and 134) to each of the plurality of amplifying sections. The common transmit signal provided to each of the plurality of drivers is preconditioned, based on the individual control signal.
摘要翻译： 提供了一种用于向分布式功率放大系统提供输入的系统和方法。 在一个实施例中，分布式功率放大系统包括多个放大部分（102,104,106和108）和多个驱动器（110,112,114和116）。 多个驱动器中的每个驱动器接收公共发送信号（118）和单独的控制信号（120,122,124和126）。 所述多个驱动器中的每个驱动器独立地对所述公共发送信号进行预处理，以向所述多个放大部分中的每一个提供发送输出信号（128,130,132和134）。 提供给多个驱动器中的每一个的公共发送信号基于各个控制信号进行预处理。
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公开(公告)号：US06819181B2
公开(公告)日：2004-11-16
申请号：US10036550
申请日：2001-12-21
IPC分类号： H03F360
CPC分类号： H03F3/605
摘要： A structure and method for the improvement of interference isolation using distributed broadband technology. This structure uses signal processing across a distributed network in order to optimize the isolation of a signal of interest when noise, interference and crosstalk signal sources are present. The structure is designed so that a signal arrives at a node in the network via more than one path and is summed in a correlated or in-phase manner. Each signal path is designed so that the signal phase may be modulated to create the in-phase summing. Noise sources that arrive at the network node are added in an uncorrelated or out-of-phase manner. Therefore, the combination of the signal adding coherently and the interference adding with an uncorrelated phase improves the signal to interference ratio. This type of structure may be applied in an RF power amplifier application in order to provide an improved interference or crosstalk signal ratio.
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5.发明申请DIRECT DIGITAL SYNTHESIZER WITH VARIABLE REFERENCE FOR IMPROVED SPURIOUS PERFORMANCE 有权具有可改善性能的可变参考的直接数字合成器公开(公告)号：US20080258791A1
公开(公告)日：2008-10-23
申请号：US11861860
申请日：2007-09-26
IPC分类号： H03H11/26
CPC分类号： H03H11/265 , H03K5/131 , H03K2005/00065 , H03L7/1806
摘要： Improvement of quantization errors that arise in a delay line with finite resolution. A direct digital synthesizer (DDS), which contains a numerically controlled oscillator (NCO) and a digital-to-phase converter (DPC), is placed in the feedback loop of a phase locked loop (PLL). The DDS is used as a fractional divider of the voltage controlled oscillator (VCO) frequency, such that the reference frequency of the DDS is made variable. Alignment of the edges provided by the DDS delay line may then be adjusted. Mismatch errors in the DDS delay line are reduced by utilizing independently tunable delay elements.
摘要翻译： 改进在有限分辨率的延迟线中出现的量化误差。 包含数控振荡器（NCO）和数字 - 相位转换器（DPC）的直接数字合成器（DDS）放置在锁相环（PLL）的反馈环路中。 DDS用作压控振荡器（VCO）频率的分数分频器，使得DDS的参考频率变为可变。 然后可以调整由DDS延迟线提供的边缘的对准。 通过利用独立的可调谐延迟元件来减少DDS延迟线中的不匹配误差。
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公开(公告)号：US07409416B2
公开(公告)日：2008-08-05
申请号：US11420941
申请日：2006-05-30
申请人： Robert E. Stengel
发明人： Robert E. Stengel
IPC分类号： G06F1/02
CPC分类号： G06F1/025 , H03K5/131 , H03K2005/00045
摘要： A signal generator consistent with certain embodiments of the invention has a reference clock (34) producing a periodic sequence of reference clock output pulses. A window generator (38) generates a plurality of time windows through which a selected plurality of the reference clock output pulses are selectively passed as windowed pulses so that the windowed pulses form a selected pattern of pulses. A programmable delay (46) has resolution of delay that has finer time granularity in delay than the period of the clock output pulses. The programmable delay (46) delays each of the windowed pulses by a programmed delay time to thereby provide a timing correction to the windowed pulses to produce an output pattern of pulses.
摘要翻译： 与本发明的某些实施例一致的信号发生器具有产生周期性的参考时钟输出脉冲序列的参考时钟（34）。 窗口产生器（38）产生多个时间窗口，所选择的多个参考时钟输出脉冲通过该时间窗口被选择性地作为窗口脉冲通过，使得窗口脉冲形成选定的脉冲图案。 可编程延迟（46）具有延迟分辨率，其延迟时间比时钟输出脉冲的周期更精细。 可编程延迟（46）将每个加窗脉冲延迟编程的延迟时间，从而为加窗脉冲提供定时校正，以产生脉冲的输出模式。
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7.发明授权Dynamically matched mixer system with improved in-phase and quadrature (I/Q) balance and second order intercept point (IP2) performance 有权具有改进的同相和正交（I / Q）平衡和二阶截点（IP2）性能的动态匹配混频器系统公开(公告)号：US07251468B2
公开(公告)日：2007-07-31
申请号：US10890691
申请日：2004-07-14
IPC分类号： H04B1/10
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1483 , H03D7/165
摘要： A dynamically matched mixer system (200) for use in a direct conversion radio frequency (RF) receiver includes a frequency generator (201, 203, 205) that includes plurality of dividers (407) for providing differential local oscillator reference sources (FLO+ and FLO−) and mitigation frequency reference sources (F1 and F2) from reference oscillator (205). A mixer (209) mixes the differential local oscillator reference sources (FLO+ and FLO−) and the mitigation frequency reference sources (F1 and F2) while dynamic matching units (211, 213) are used for receiving the mitigation frequency reference sources and matching switching parameters of differential input signals (IRF+ and IRF−) and differential baseband output signals (IBB+ and IBB−). The frequencies of the mitigation frequency reference sources (F1 and F2) are selected so as to establish a non-integer relationship to the reference oscillator (201) for mitigating the occurrence of interference with FLO+ and FLO−.
摘要翻译： 用于直接转换射频（RF）接收机的动态匹配混频器系统（200）包括频率发生器（201,203,205），其包括多个分频器（407），用于提供差分本地振荡器参考源（F and and> LO LO LO LO LO LO LO LO）和缓解频率参考源（F 1和F 2） 单元（211,213）用于接收缓解频率参考源和差分输入信号（I + RF +和I + RF - ）的匹配切换参数和差分基带输出信号 （I BB +和/或BB - ）。 选择缓解频率参考源（F 1和F 2）的频率以便建立与参考振荡器（201）的非整数关系，以便减轻与F LO和/ F
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公开(公告)号：US06891420B2
公开(公告)日：2005-05-10
申请号：US10036558
申请日：2001-12-21
CPC分类号： H03L7/22 , H03L7/0812 , H03L7/16
摘要： A digital frequency synthesizer includes one or more reference clocks (104, 1316, 1502A, 1504A, 1506A) optionally coupled through one or more pulse width reducers (106) to one or more main delay lines (108, 702, 1502B, 1504B, 1506B) that include a plurality of output taps (108B-108I, 702B-702E). During at least certain periods of the reference clock (104) a plurality of the output taps are coupled to a common output (130, 1312, 1508), thereby producing an output signal that has a frequency that exceeds a frequency of the one or more reference clocks. The coupling is preferably accomplished by transmission gates (114, 128, 720-724, 1420-1434) that are switched by gating pulses that are received from decoders (148, 150, 1418) via gating signal delay lines (134-146, 704-718, 1404-1416).
摘要翻译： 数字频率合成器包括一个或多个参考时钟（104,1316,1502A，1504A，1506A），其可选地通过一个或多个脉冲宽度减法器（106）耦合到一个或多个主延迟线（108,702,1502B ，1504B，1506B），其包括多个输出抽头（108B-108I，702B-702E）。 在参考时钟（104）的至少某些时段期间，多个输出抽头耦合到公共输出（130,1312,1508），从而产生具有超过一个或多个频率的频率的频率的输出信号 参考时钟。 耦合优选地由通过选通脉冲切换的传输门（114,128,720-724,1420-1434）完成，门脉冲经由选通信号延迟线（134-146,704）从解码器（148,150,1418）接收 -718,1404-1416）。
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公开(公告)号：US06542270B2
公开(公告)日：2003-04-01
申请号：US09733717
申请日：2000-12-08
IPC分类号： H04B1000
CPC分类号： G01S1/70 , H04B10/114 , H04B10/116 , H05B37/0272
摘要： An interference-robust coded-modulation scheme for optical communications and a method for modulating illumination for optical communications include optical signal transmitters connected to signal multipliers. The signal to be transmitted is multiplied by a pseudo-random noise code and transmitted within the transmitter emissions. A receiver converts the received modulated light and correlates the received signal. An estimate of the signal to be transmitted is made by multiplying the received signal by the noise code and correlating such multiplication over the length of the code. A threshold switch outputs the correlation result to a bit estimator approximately when a deterministic peak of the output signal exceeds a threshold.
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10.发明授权公开(公告)号：US06539344B1
公开(公告)日：2003-03-25
申请号：US09553814
申请日：2000-04-21
IPC分类号： G06F760
CPC分类号： G06F17/5036
摘要： A parameter extraction technique for an electrical structure is based on a definition of network parameters that isolates pure mode responses of the electrical structure, and that makes mode conversion responses of the electrical structure negligible. A set of network parameters is obtained that represents pure mode responses for the electrical structure (410). These network parameters are processed to obtain model parameters that characterize each pure mode response (422, 424, 426, 428, 432, 434, 436, 438). Preferably, the mode specific parameters to combined to obtain mode independent parameters, such as coupling factor, propagation constant, and characteristic impedance values (440, 450).
摘要翻译： 用于电气结构的参数提取技术基于隔离电气结构的纯模式响应的网络参数的定义，并且使得电气结构的模式转换响应可忽略不计。 获得代表电结构（410）的纯模式响应的一组网络参数。 处理这些网络参数以获得表征每个纯模式响应（422,424,426,428,432,434,436,438）的模型参数。 优选地，组合的模式特定参数以获得模式无关参数，例如耦合因子，传播常数和特征阻抗值（440,450）。
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