公开(公告)号：US20240231625A1

公开(公告)日：2024-07-11

申请号：US18094990

申请日：2023-01-10

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679

Abstract: A flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface. The flash memory controller sends a debug injection set-feature signal to the flash memory device through the specific communication interface to configure an operation of a debug circuit of the flash memory device to make the debug circuit automatically generate debug information of an access operation of an access command signal sent from the flash memory controller, transmit the generated debug information from the flash memory device to the flash memory controller via the I/O control circuit and the specific communication interface, without controlling a memory cell array of flash memory device generating errors.

公开(公告)号：US20240111417A1

公开(公告)日：2024-04-04

申请号：US17956855

申请日：2022-09-30

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0679

Abstract: A method of a flash memory controller includes: controlling an I/O circuit using a set-feature signal, which carries a set-feature command, feature address, and parameter information, and transmitting the set-feature signal to a flash memory device; the feature address corresponds to a valid data portion or a dummy data portion following the valid data portion, and both the valid data portion and dummy data portion are comprised in a full page data which is to be written into a physical page unit of the flash memory device or to be read out from the physical page unit; the corresponding parameter information is used to record the valid data portion's column address and data length, the dummy data portion's column address and data length, the dummy data portion's column address and the valid data portion's, or the dummy data portion's data length and the valid data portion's data length.

公开(公告)号：US20240094912A1

公开(公告)日：2024-03-21

申请号：US17993896

申请日：2022-11-24

Applicant: Silicon Motion, Inc.

Inventor： Chia-Chi Liang ,  Hsiao-Chang Yen ,  Tsu-Han Lu

IPC: G06F3/06

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0679

Abstract: A method for accessing a flash memory module includes: determining a type of data to be written into the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to the type of data, wherein the plurality of sets of encoding/decoding settings correspond to different data lengths, respectively; utilizing the specific encoding/decoding setting to encode the data to generate encoded data; and writing the encoded data into a block of the flash memory module.

公开(公告)号：US11809748B2

公开(公告)日：2023-11-07

申请号：US17692121

申请日：2022-03-10

Applicant: Silicon Motion, Inc.

Inventor： Chia-Chi Liang ,  Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/064 ,  G06F3/0611 ,  G06F3/0679

Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, the flash memory module includes a plurality of planes, and each plane includes a plurality of blocks; and the control method includes the steps of: after the flash memory controller is powered on, reading a first code bank from a specific block of the plurality of blocks; storing the first code bank into a buffer memory; executing the first code bank to manage the flash memory module; when the flash memory controller starts a code bank swapping operation, trying to read a second code bank from a super block; if the second code bank is read successfully, storing the second code bank into the buffer memory to replace the first code bank; and executing the second code bank to manage the flash memory module.

公开(公告)号：US20230268002A1

公开(公告)日：2023-08-24

申请号：US17679125

申请日：2022-02-24

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G11C16/08 ,  G11C16/14 ,  G11C16/10 ,  G11C16/26 ,  G11C16/04

CPC classification number: G11C16/08 ,  G11C16/14 ,  G11C16/102 ,  G11C16/26 ,  G11C16/0433

Abstract: A flash memory scheme simplifies the command sequences transmitted between a flash memory device and a flash memory controller into a simplified command sequence so as to reduce the waiting time period of the command transmission and improve the performance of flash memory.

公开(公告)号：US20230266922A1

公开(公告)日：2023-08-24

申请号：US17679116

申请日：2022-02-24

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0611 ,  G06F3/0679 ,  G06F12/0238

Abstract: A flash memory scheme simplifies the command sequences transmitted between a flash memory device and a flash memory controller into a simplified command sequence so as to reduce the waiting time period of the command transmission and improve the performance of flash memory.

公开(公告)号：US20230266895A1

公开(公告)日：2023-08-24

申请号：US17679136

申请日：2022-02-24

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06

CPC classification number: G06F3/0629 ,  G06F3/061 ,  G06F3/0679

Abstract: A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to the flash memory device; and sending a data toggle set-feature signal to the flash memory device to enable, disable, or configure a data toggle operation of the flash memory device; the data toggle operation of the flash memory device is arranged to make the flash memory device control the flash memory device's data register selecting and transferring a first data unit and a second data unit to the flash memory device's I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to a specific read command or a data toggle command transmitted by the flash memory controller.

公开(公告)号：US20240232085A1

公开(公告)日：2024-07-11

申请号：US18094986

申请日：2023-01-10

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F12/0837 ,  G06F12/0882 ,  G06F12/128

CPC classification number: G06F12/0837 ,  G06F12/0882 ,  G06F12/128

Abstract: A flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface. The flash memory controller sends a debug injection command signal to the flash memory device through the specific communication interface to configure an operation of a debug circuit of the flash memory device to make the debug circuit automatically generate debug information of an access operation of the debug injection command signal sent from the flash memory controller, transmit the generated debug information from the flash memory device to the flash memory controller via the I/O control circuit and the specific communication interface, without controlling a memory cell array of flash memory device generating errors.

公开(公告)号：US20240231638A1

公开(公告)日：2024-07-11

申请号：US18094994

申请日：2023-01-10

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0634 ,  G06F3/0659 ,  G06F3/0679

Abstract: A flash memory controller to be used in a storage device and coupled to a flash memory device of the storage device through a specific communication interface. The flash memory controller sends an error injection set-feature signal to the flash memory device through the specific communication interface to configure an operation of a debug circuit of the flash memory device to make the debug circuit automatically generate debug information of an access operation of an access command signal sent from the flash memory controller, transmit the generated debug information from the flash memory device to the flash memory controller via the I/O control circuit and the specific communication interface, with actually controlling a memory cell array of flash memory device generating failure errors.

公开(公告)号：US11977752B2

公开(公告)日：2024-05-07

申请号：US17679136

申请日：2022-02-24

Applicant: Silicon Motion, Inc.

Inventor： Tsu-Han Lu ,  Hsiao-Chang Yen

IPC: G06F3/06

CPC classification number: G06F3/0629 ,  G06F3/061 ,  G06F3/0679

Abstract: A method of a flash memory controller includes: providing an input/output (I/O) circuit coupled to the flash memory device; and sending a data toggle set-feature signal to the flash memory device to enable, disable, or configure a data toggle operation of the flash memory device; the data toggle operation of the flash memory device is arranged to make the flash memory device control the flash memory device's data register selecting and transferring a first data unit and a second data unit to the flash memory device's I/O control circuit to make the I/O control circuit sequentially transmit the first data unit and the second data unit to the flash memory controller through the specific communication interface in response to a specific read command or a data toggle command transmitted by the flash memory controller.