公开(公告)号：US07054987B1

公开(公告)日：2006-05-30

申请号：US10741069

申请日：2003-12-19

申请人： David G. Reed ,  Brian K. Langendorf ,  Brad W. Simeral ,  Anand Srinivasan

发明人： David G. Reed ,  Brian K. Langendorf ,  Brad W. Simeral ,  Anand Srinivasan

IPC分类号： G06F13/00 ,  G06F13/14 ,  G06F13/38 ,  G06F11/00 ,  G06F12/00

CPC分类号： G06F13/16

摘要： A bus interface unit is adapted to receive transaction requests for at least two different targets. The bus interface unit monitors a capacity of a resource associated with servicing transaction requests to the targets, such as a posted write buffer. If a transaction request would fill the resource beyond a current remaining capacity of the resource such that the execution of other pipelined transactions would become stalled, the bus interface generates a retry response so that the request is retried at a later time, permitting other transactions to proceed while the resource drains.

摘要翻译： 总线接口单元适于接收至少两个不同目标的交易请求。 总线接口单元监视与针对目标的事务请求的服务相关联的资源的容量，例如已发布的写入缓冲器。 如果事务请求将超过资源的当前剩余容量填充资源，使得其他流水线事务的执行将变得停滞，则总线接口产生重试响应，以便稍后重试该请求，允许其他事务 在资源耗尽时继续进行。

公开(公告)号：US06952051B1

公开(公告)日：2005-10-04

申请号：US09627649

申请日：2000-07-28

申请人： Gurtej Sandhu ,  Anand Srinivasan ,  Ravi Iyer

发明人： Gurtej Sandhu ,  Anand Srinivasan ,  Ravi Iyer

IPC分类号： H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76801 ,  H01L21/76834 ,  H01L21/76837

摘要： An interlevel dielectric structure includes first and second dielectric layers between which are located lines of a conductive material with a dielectric material in spaces between the lines of conductive material, with the lower surface of the dielectric material extending lower than the lower surface of lines of conductive material adjacent thereto, and the upper surface of the dielectric material extending higher than the upper surface of conductive material adjacent thereto, thus reducing fringe and total capacitance between the lines of conductive material. The dielectric material, which has a dielectric constant of less than about 3.6, does not extend directly above the upper surface of the lines of conductive material, allowing formation of subsequent contacts down to the lines of conductive material without exposing the dielectric material to further processing. Various methods for forming the interlevel dielectric structure are disclosed.

摘要翻译： 层间电介质结构包括第一和第二电介质层，它们之间位于导电材料的导线之间，其中电介质材料位于导电材料线之间的空间中，电介质材料的下表面延伸低于导电线路的下表面 材料相邻，并且电介质材料的上表面比邻近导电材料的上表面延伸得更高，从而减少导电材料线之间的条纹和总电容。 具有小于约3.6的介电常数的电介质材料不直接在导电材料线的上表面的上方延伸，从而允许随后的触点形成至导电材料的线，而不会将电介质材料暴露于进一步的加工 。 公开了形成层间电介质结构的各种方法。

公开(公告)号：US06889338B2

公开(公告)日：2005-05-03

申请号：US09961379

申请日：2001-09-25

申请人： Anand Srinivasan ,  Pramod Dhakal

发明人： Anand Srinivasan ,  Pramod Dhakal

IPC分类号： H04L1/22 ,  G06F11/00

CPC分类号： H04L1/22

摘要： A fault-tolerant server group operating in client-server distributed dynamic network system environment includes a master server which receives a request sent by a client. The fault-tolerant server group includes the master server and at least one back-up server. The master server communicates with both the client and the back-up servers. Each server in the fault-tolerant server group, including the master server and the back-up servers, has an election mechanism, enabling the fault-tolerant server group to elect a new master server when the master server fails. During the election, some of the election mechanisms are triggered at different times. The fault-tolerant server group processes the request from the client to generate processing result. The processing result is sent from the master server to the client.

摘要翻译： 在客户端 - 服务器分布式动态网络系统环境中运行的容错服务器组包括接收客户端发送的请求的主服务器。 容错服务器组包括主服务器和至少一个备用服务器。 主服务器与客户端和备份服务器通信。 容错服务器组中的每个服务器（包括主服务器和备份服务器）都有一个选举机制，当主服务器发生故障时，允许容错服务器组选择一台新的主服务器。 在选举中，有些选举机制是在不同时期触发的。 容错服务器组处理来自客户端的请求以生成处理结果。 处理结果从主服务器发送到客户端。

公开(公告)号：US06274479B1

公开(公告)日：2001-08-14

申请号：US09137736

申请日：1998-08-21

申请人： Anand Srinivasan

发明人： Anand Srinivasan

IPC分类号： H01L214763

CPC分类号： H01L29/6656 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02304 ,  H01L21/31051 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/823425 ,  H01L21/823468 ,  H01L29/4983

摘要： The invention is a method for constructing an integrated circuit structure and an apparatus produced by the method. The method generally comprises constructing an integrated circuit structure by disposing a layer of doped oxide, the dopant being iso-electronic to silicon, and then reflowing the layer of doped oxide. Thus, the apparatus of the invention is an integrated circuit structure comprising a reflowed layer of doped oxide wherein the dopant is iso-electronic to silicon. In one particular embodiment, the method generally comprises constructing an integrated circuit feature on a substrate; disposing a layer of doped oxide, the dopant being iso-electronic to silicon, over the integrated circuit feature and the substrate in a substantially conformal manner; reflowing the layer of doped oxide; and etching the insulating layer and the oxide. Thus, in this particular embodiment, the apparatus comprises an integrated circuit feature constructed on a substrate and a reflowed layer of doped oxide, the dopant being iso-electronic to silicon, disposed over the integrated circuit feature and the substrate.

摘要翻译： 本发明是一种构成集成电路结构的方法和由该方法制造的装置。 该方法通常包括通过将掺杂的氧化物层，该掺杂剂与硅等电子化，然后回流掺杂的氧化物层来构建集成电路结构。 因此，本发明的装置是包括掺杂氧化物的回流层的集成电路结构，其中掺杂剂与硅是等电子的。 在一个特定实施例中，该方法通常包括在衬底上构建集成电路特征; 以基本上保形的方式在所述集成电路特征和所述衬底上设置掺杂氧化物层，所述掺杂剂与硅异电子; 回流掺杂氧化物层; 并蚀刻绝缘层和氧化物。 因此，在该特定实施例中，该装置包括构造在衬底上的集成电路特征和掺杂氧化物的回流层，该掺杂剂与硅均匀地设置在集成电路特征和衬底上。

公开(公告)号：US06210813B1

公开(公告)日：2001-04-03

申请号：US09145784

申请日：1998-09-02

申请人： Robert Burke ,  Farrell Good ,  Anand Srinivasan

发明人： Robert Burke ,  Farrell Good ,  Anand Srinivasan

IPC分类号： B32B1500

CPC分类号： C23C16/42 ,  C23C16/24 ,  H01L21/28518 ,  Y10T428/12528 ,  Y10T428/12549 ,  Y10T428/12674

摘要： A metal silicide film and method of forming the same are provided. The method comprises depositing metal silicide layers onto a substrate assembly with alternating layers of silicon. The resulting metal silicide film has a disrupted grain structure and smaller grain sizes than prior art films of the same thickness, which increases the resistance of the material to stress cracks in subsequent thermal processing and reduces the overall residual stress of the material.

摘要翻译： 提供金属硅化物膜及其制备方法。 该方法包括将金属硅化物层沉积到具有交替的硅层的衬底组件上。 所得到的金属硅化物膜具有与现有技术相同厚度的膜相比晶粒结构破碎并且晶粒尺寸更小，这增加了随后的热处理中材料对应力裂纹的阻力，并降低了材料的总剩余应力。

公开(公告)号：US6077754A

公开(公告)日：2000-06-20

申请号：US18925

申请日：1998-02-05

申请人： Anand Srinivasan ,  Sujit Sharan ,  Gurtej S. Sandhu

发明人： Anand Srinivasan ,  Sujit Sharan ,  Gurtej S. Sandhu

IPC分类号： H01L21/02 ,  H01L21/318

CPC分类号： H01L28/40 ,  H01L21/3185

摘要： A method of forming silicon nitride includes, a) forming a first layer comprising silicon nitride over a substrate; b) forming a second layer comprising silicon on the first layer; and c) nitridizing silicon of the second layer into silicon nitride to form a silicon nitride comprising layer, said silicon nitride comprising layer comprising silicon nitride of the first and second layers. Further, a method of forming a capacitor dielectric layer of silicon nitride includes, a) forming a first capacitor plate layer; b) forming a first silicon nitride layer over the first capacitor plate layer; c) forming a silicon layer on the silicon nitride layer; d) nitridizing the silicon layer into a second silicon nitride layer; and e) forming a second capacitor plate layer over the second silicon nitride layer. Also, a method of forming a capacitor dielectric layer over a capacitor plate layer includes, a) forming a first layer of dielectric material over a capacitor plate layer; b) conducting a pin-hole widening wet etch of the first layer; and c) after the wet etch, forming a pin-hole plugging second layer of dielectric material on the first layer and within the widened pin-holes.

摘要翻译： 一种形成氮化硅的方法包括：a）在衬底上形成包含氮化硅的第一层; b）在第一层上形成包含硅的第二层; 以及c）将所述第二层的硅氮化成氮化硅以形成包含氮化硅的层，所述氮化硅层包括第一层和第二层的氮化硅。 此外，形成氮化硅电容器电介质层的方法包括：a）形成第一电容器板层; b）在所述第一电容器板层上形成第一氮化硅层; c）在氮化硅层上形成硅层; d）将硅层氮化成第二氮化硅层; 以及e）在所述第二氮化硅层上方形成第二电容器板层。 此外，在电容器板层上形成电容器电介质层的方法包括：a）在电容器板层上形成介电材料的第一层; b）进行第一层的针孔加宽湿蚀刻; 以及c）在湿蚀刻之后，在第一层上和扩宽的针孔内形成针孔堵塞的第二介电材料层。

公开(公告)号：US10577638B2

公开(公告)日：2020-03-03

申请号：US15023568

申请日：2014-09-23

申请人： Anand Srinivasan ,  Anand K. Ramasubramanian ,  Jose L. Lopez-Ribot ,  Christopher R. Frei

发明人： Anand Srinivasan ,  Anand K. Ramasubramanian ,  Jose L. Lopez-Ribot ,  Christopher R. Frei

IPC分类号： C12Q1/18

摘要： The present disclosure provides for systems, devices, products, and methods for detecting and identifying microbial organisms in a sample as well as testing antimicrobial susceptibility of microbial organisms.

公开(公告)号：US09430494B2

公开(公告)日：2016-08-30

申请号：US12949081

申请日：2010-11-18

申请人： Hoyong Park ,  Alexandre de Castro Alves ,  Unmesh Deshmukh ,  Anand Srinivasan

发明人： Hoyong Park ,  Alexandre de Castro Alves ,  Unmesh Deshmukh ,  Anand Srinivasan

IPC分类号： G06F17/30

CPC分类号： G06F17/30241 ,  G06F17/30516

摘要： Techniques for extending the capabilities of an event processing system to support the processing of spatial data. In one set of embodiments, this extensibility can be provided via a plug-in extension component referred to herein as a spatial data cartridge. The spatial data cartridge can enable the event processing system to support spatial data types (e.g., point, polygon, etc.) and various operations related to such data types (e.g., proximity determinations, overlap determinations, etc.). The spatial data cartridge can also define an indexing scheme that can be integrated with the capabilities of the event processing system to support the indexing of spatial data. Using the spatial data cartridge, the event processing system can operate on spatial data even if spatial data formats are not natively supported by the system.

摘要翻译： 用于扩展事件处理系统的能力以支持空间数据处理的技术。 在一组实施例中，可以通过本文称为空间数据盒的插件扩展组件来提供该可扩展性。 空间数据盒可以使得事件处理系统能够支持空间数据类型（例如，点，多边形等）和与这种数据类型相关的各种操作（例如，接近度确定，重叠确定等）。 空间数据盒还可以定义可与事件处理系统的能力集成以支持空间数据索引的索引方案。 使用空间数据盒，事件处理系统即使空间数据格式本身不被系统支持，也可以对空间数据进行操作。

公开(公告)号：US09305238B2

公开(公告)日：2016-04-05

申请号：US12548187

申请日：2009-08-26

申请人： Anand Srinivasan ,  Rakesh Komuravelli ,  Namit Jain ,  Shailendra Mishra

发明人： Anand Srinivasan ,  Rakesh Komuravelli ,  Namit Jain ,  Shailendra Mishra

IPC分类号： G06F17/30 ,  G06K9/62

CPC分类号： G06K9/62

摘要： Techniques for detecting patterns in one or more data or event streams. A pattern to be detected may be specified using a regular expression. Events received in a data stream are processed during runtime to detect occurrences of the specified pattern in the data stream. In one embodiment, a pattern type or class is determined for the specified pattern and pattern matching is performed using a technique selected based upon the type or class determined for the specified pattern.

摘要翻译： 用于检测一个或多个数据或事件流中的模式的技术。 可以使用正则表达式来指定要检测的模式。 在运行期间处理在数据流中接收的事件，以检测数据流中指定模式的出现。 在一个实施例中，对于指定的图案确定图案类型或类别，并且使用基于为指定图案确定的类型或类别而选择的技术来执行图案匹配。

公开(公告)号：US20160034515A1

公开(公告)日：2016-02-04

申请号：US13445790

申请日：2012-04-12

申请人： Lalitesh Katragadda ,  Vinay Chitlangia ,  Mandayam Thondanur Raghunath ,  Anand Srinivasan ,  Lakshminath Bhuvanagiri

发明人： Lalitesh Katragadda ,  Vinay Chitlangia ,  Mandayam Thondanur Raghunath ,  Anand Srinivasan ,  Lakshminath Bhuvanagiri

IPC分类号： G06F3/048

CPC分类号： G06F16/29

摘要： To generate address components for a selected map feature, all polygonal map features containing or near the location of a selected map feature are identified. The error bounds of each identified polygon are modeled based on the quality of the boundary of the polygon. Then, the error bounds of the polygon are compared to the location of the selected map feature to determine the strength of the match. The address components corresponding to the identified polygons are suggested to be components of the address of the selected map feature based on the strength of the matches. In another embodiment, a risk of inaccuracy of a combination of address components in an edited map feature is determined from comparison to other map data and can be adjusted based in part on the magnitude of an inconsistency between address components.

摘要翻译： 为了生成所选地图特征的地址分量，识别包含或接近所选地图特征位置的所有多边形地图特征。 基于多边形边界的质量，对所确定的多边形的误差范围进行建模。 然后，将多边形的误差范围与所选择的地图特征的位置进行比较，以确定匹配的强度。 基于匹配的强度，与所识别的多边形相对应的地址组件被建议为所选地图特征的地址的组成部分。 在另一个实施例中，编辑的地图特征中的地址分量的组合的不准确性的风险是与其他地图数据的比较来确定的，并且可以部分地基于地址分量之间的不一致性的大小进行调整。