公开(公告)号：US11251138B2

公开(公告)日：2022-02-15

申请号：US16717262

申请日：2019-12-17

Applicant: Texas Instruments Incorporated

Inventor： Scott Robert Summerfelt ,  Thomas Dyer Bonifield ,  Sreeram Subramanyam Nasum ,  Peter Smeys ,  Benjamin Stassen Cook

IPC: H01L23/00 ,  H01L23/29 ,  H01L21/78 ,  H01L23/64 ,  H01L21/762 ,  H01L23/31

Abstract: In described examples of an integrated circuit (IC) there is a substrate of semiconductor material having a first region with a first transistor formed therein and a second region with a second transistor formed therein. An isolation trench extends through the substrate and separates the first region of the substrate from the second region of the substrate. An interconnect region having layers of dielectric is disposed on a top surface of the substrate. A dielectric polymer is disposed in the isolation trench and in a layer over the backside surface of the substrate. An edge of the polymer layer is separated from the perimeter edge of the substrate by a space.

公开(公告)号：US10978135B2

公开(公告)日：2021-04-13

申请号：US16793447

申请日：2020-02-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreeram Subramanyam Nasum ,  Niranjan Shankar ,  Kumar Anurag Shrivastava ,  Kashyap Barot

IPC: G11C11/406 ,  G11C11/409 ,  G11C7/10 ,  G11C7/22

Abstract: An encoding and transmitting system for a digital isolator system includes a transmitter for transmitting combined edge indicator signals through an isolation barrier, an encoder for generating the combined edge indicator signals based on first and second signals, a refresh clock generator for generating a refresh clock signal based on the first signal, and a refresh edge generator for masking at least a portion of the refresh clock signal, such that the portion of the refresh clock signal is not reflected in the second signal. The isolation barrier of the digital isolator system may be a capacitive isolation barrier for galvanically isolating a receiver from the transmitter. If desired, the refresh edge generator may include a refresh mask generator, one or more logic gates, and a glitch filter. A method of operating a digital isolator system is also described.

公开(公告)号：US10790782B2

公开(公告)日：2020-09-29

申请号：US16223545

申请日：2018-12-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tarunvir Singh ,  Kumar Anurag Shrivastava ,  Somshubhra Paul ,  Sreeram Subramanyam Nasum

IPC: H03B5/12 ,  H03F3/45

Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

公开(公告)号：US10761111B2

公开(公告)日：2020-09-01

申请号：US15989126

申请日：2018-05-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Arun Adoni ,  Suvadip Banerjee ,  Sreeram Subramanyam Nasum ,  Prajkta Vyavahare

IPC: G01R1/067 ,  G01R31/28 ,  G01R35/00

Abstract: A system includes a controller for automated test equipment (ATE) contactor to interface with a device under test (DUT) including a power converter having a primary and secondary side, each side has an input/output (I/O) pin. The controller causes the ATE contactor to apply a load current on the secondary side of the power converter at a first value and vary the load current to a second value. The contactor receives first and second indications, at the first and second load currents, of a voltage on the primary side I/O pin, a voltage on the primary side of the power converter, an input current on the primary side of the power converter, a voltage on the secondary side I/O pin, and a voltage on the secondary side of the power converter. The controller determines a primary and secondary side ATE contactor resistances based on the first and second indications.

公开(公告)号：US20200044605A1

公开(公告)日：2020-02-06

申请号：US16601081

申请日：2019-10-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subhashish Mukherjee ,  Kumar Anurag Shrivastava ,  Sreeram Subramanyam Nasum

IPC: H03B5/12 ,  H04L25/02 ,  H01L25/10 ,  H02J50/12 ,  G06K19/077 ,  H01L23/64 ,  H01L23/31 ,  H01L23/00

Abstract: For communication across a capacitively coupled channel, an example circuit includes a first plate substantially parallel to a substrate, forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.