公开(公告)号：US11901282B2

公开(公告)日：2024-02-13

申请号：US16585393

申请日：2019-09-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kumar Anurag Shrivastava

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/00 ,  H01L49/02

CPC classification number: H01L23/5223 ,  H01L23/5286 ,  H01L24/05 ,  H01L24/48 ,  H01L28/60 ,  H01L2224/04042 ,  H01L2224/48137

Abstract: An integrated semiconductor device having a metallic element formed between a capacitor with and a doped region.

公开(公告)号：US11809206B2

公开(公告)日：2023-11-07

申请号：US17446132

申请日：2021-08-26

Applicant: Texas Instruments Incorporated

Inventor： Kishalay Datta ,  Anant Shankar Kamath ,  Kumar Anurag Shrivastava ,  Swaminathan Sankaran

IPC: G05F1/46 ,  G05F1/56 ,  H03F1/02 ,  H04B1/16

CPC classification number: G05F1/56 ,  H03F1/0216 ,  H04B1/16 ,  H03F2200/102 ,  H03F2200/165

Abstract: An example apparatus includes: a compensation circuit including: a current compensation output, a first transistor with a first current terminal and a first control terminal, the first current terminal coupled to the current compensation output, and a resistor ladder with a tap terminal coupled to the first control terminal, a current mirror circuit having a mirror input and a mirror output, the mirror input coupled to the current compensation output, and a rectification circuit having an input coupled to the mirror output.

公开(公告)号：US20230025757A1

公开(公告)日：2023-01-26

申请号：US17489483

申请日：2021-09-29

Applicant: Texas Instruments Incorporated

Inventor： RR Manikandan ,  Kumar Anurag Shrivastava ,  Robert Floyd Payne ,  Anant Shankar Kamath ,  Swaminathan Sankaran ,  Kishalay Datta ,  Siraj Akhtar ,  Mark Edward Wentroble ,  Suvadip Banerjee ,  Rakesh Hariharan ,  Gurumurti Kailaschandra Avhad

IPC: H04B1/44 ,  H03K3/017 ,  H03K5/24 ,  H04L27/04 ,  H04L27/06

Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.

公开(公告)号：US10965382B1

公开(公告)日：2021-03-30

申请号：US16738009

申请日：2020-01-09

Applicant: Texas Instruments Incorporated

Inventor： Kumar Anurag Shrivastava

IPC: H04B14/02 ,  H03B5/06 ,  H03B5/12 ,  H04L27/04 ,  H04L25/03 ,  H04L25/02

Abstract: An oscillator for use in pulse communication of pulse signals with a startup latency and a pulse oscillation signal (such as for use in a transmitter for OOK pulse communication with pulse modulation). The oscillator includes an LC resonator having a tank impedance, and including a high-side node (Vp), and a low-side node Vn, and having a tank voltage corresponding to [Vp-Vn]. A pulse startup circuit, includes a PMOS transistor with a source connected to a supply voltage VDD, and a drain connected through a resistance R to the Vp node (where R is significantly larger than the tank impedance), and connected to an attenuation capacitance, in parallel with the resistance R. The PMOS control terminal is coupled to receive a kick start pulse to initiate a pulse signal. the oscillator can include high-side and low-side pulse startup circuits.

公开(公告)号：US10483909B2

公开(公告)日：2019-11-19

申请号：US15173044

申请日：2016-06-03

Applicant: Texas Instruments Incorporated

Inventor： Subhashish Mukherjee ,  Kumar Anurag Shrivastava ,  Madhulatha Bonu

IPC: H03B5/04 ,  H03B5/06 ,  H03B5/12 ,  H03L3/00 ,  H03L7/00

Abstract: Methods and apparatus are disclosed to generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

公开(公告)号：US20240291696A1

公开(公告)日：2024-08-29

申请号：US18204260

申请日：2023-05-31

Applicant: Texas Instruments Incorporated

Inventor： Kumar Anurag Shrivastava ,  Sreeram S ,  Tarunvir Singh

IPC: H04L25/02 ,  H03K5/19 ,  H03K19/173 ,  H04B1/04 ,  H04B1/16

CPC classification number: H04L25/0266 ,  H03K5/19 ,  H03K19/173 ,  H04B1/04 ,  H04B1/16

Abstract: An example apparatus includes: transmitter channel circuitry including: a buffer having an output; and a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the output of the buffer; an isolation transformer including: a first inductor having a terminal coupled to the second terminal of the capacitor; and a second inductor magnetically coupled to the first inductor across an isolation barrier, and receiver channel circuitry coupled to the second inductor.

公开(公告)号：US10978135B2

公开(公告)日：2021-04-13

申请号：US16793447

申请日：2020-02-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreeram Subramanyam Nasum ,  Niranjan Shankar ,  Kumar Anurag Shrivastava ,  Kashyap Barot

IPC: G11C11/406 ,  G11C11/409 ,  G11C7/10 ,  G11C7/22

Abstract: An encoding and transmitting system for a digital isolator system includes a transmitter for transmitting combined edge indicator signals through an isolation barrier, an encoder for generating the combined edge indicator signals based on first and second signals, a refresh clock generator for generating a refresh clock signal based on the first signal, and a refresh edge generator for masking at least a portion of the refresh clock signal, such that the portion of the refresh clock signal is not reflected in the second signal. The isolation barrier of the digital isolator system may be a capacitive isolation barrier for galvanically isolating a receiver from the transmitter. If desired, the refresh edge generator may include a refresh mask generator, one or more logic gates, and a glitch filter. A method of operating a digital isolator system is also described.

公开(公告)号：US10855333B2

公开(公告)日：2020-12-01

申请号：US16021175

申请日：2018-06-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kumar Anurag Shrivastava

IPC: H04B3/32 ,  H04B1/10 ,  H04L25/02

Abstract: An inductively coupled multi-channel digital isolator where the transmitter and receiver inductive loops of a given channel are coplanar. In the case where two adjacent channels flow data in opposite directions, the receiver inductive loops of a given channel include a large, generally conventional loop portion and a small loop portion that is located inside the transmitter inductive loops of the adjacent channels. The sizes of the small loop portion and the conventional loop portion are generally in the ratio of the magnetic flux in the conventional loop portion to the magnetic flux in the transmitter inductive loop. This size relationship results in the voltage of the small loop portion being very close but opposite in sign to the voltage in the conventional loop portion. As a result, there is minimal crosstalk from the transmitter inductive loop of one channel to the receiver inductive loop of the adjacent channel.

公开(公告)号：US10790782B2

公开(公告)日：2020-09-29

申请号：US16223545

申请日：2018-12-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tarunvir Singh ,  Kumar Anurag Shrivastava ,  Somshubhra Paul ,  Sreeram Subramanyam Nasum

IPC: H03B5/12 ,  H03F3/45

Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

公开(公告)号：US10728068B2

公开(公告)日：2020-07-28

申请号：US15860988

申请日：2018-01-03

Applicant: Texas Instruments Incorporated

Inventor： Subhashish Mukherjee ,  Abhijit Anant Patki ,  Madhulatha Bonu ,  Kumar Anurag Shrivastava

IPC: H04L27/22 ,  H03D3/00 ,  H03L7/081 ,  H04L27/227 ,  H03K19/21 ,  H03L7/087 ,  H03L7/113 ,  H04L7/033 ,  H04L7/00

Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.