公开(公告)号：US10325912B2

公开(公告)日：2019-06-18

申请号：US15797626

申请日：2017-10-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Li-Wei Yin ,  Tzu-Wen Pan ,  Yi-Chun Chen ,  Cheng-Chung Chang ,  Shao-Hua Hsu ,  Yu-Hsien Lin ,  Ming-Ching Chang

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/308 ,  H01L21/321 ,  H01L21/762 ,  H01L27/088 ,  H01L21/3065 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/8234

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.