-
公开(公告)号:US20240371869A1
公开(公告)日:2024-11-07
申请号:US18775025
申请日:2024-07-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Cheng-Chung Chang , Shao-Hua Hsu , Yu-Hsien Lin , Ming-Ching Chang , Li-Wei Yin , Tzu-Wen Pan , Yi-Chun Chen
IPC: H01L27/088 , H01L21/3065 , H01L21/308 , H01L21/3105 , H01L21/321 , H01L21/3213 , H01L21/762 , H01L21/8234 , H01L27/02 , H01L29/06 , H01L29/66 , H01L29/78
Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
-
公开(公告)号:US11894370B2
公开(公告)日:2024-02-06
申请号:US17818405
申请日:2022-08-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Cheng-Chung Chang , Shao-Hua Hsu , Yu-Hsien Lin , Ming-Ching Chang , Li-Wei Yin , Tzu-Wen Pan , Yi-Chun Chen
IPC: H01L21/76 , H01L29/06 , H01L27/088 , H01L27/02 , H01L29/66 , H01L21/8234 , H01L21/3065 , H01L29/78 , H01L21/3213 , H01L21/762 , H01L21/321 , H01L21/308 , H01L21/3105
CPC classification number: H01L27/0886 , H01L21/3065 , H01L21/32133 , H01L21/76224 , H01L21/76229 , H01L21/823431 , H01L21/823437 , H01L21/823481 , H01L27/0207 , H01L29/0649 , H01L29/66545 , H01L29/7842 , H01L21/3086 , H01L21/31053 , H01L21/3212
Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
-
公开(公告)号:US20210280695A1
公开(公告)日:2021-09-09
申请号:US17325622
申请日:2021-05-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Li-Wei Yin , Tzu-Wen Pan , Cheng-Chung Chang , Shao-Hua Hsu , Yi-Chun Chen , Yu-Hsien Lin , Ming-Ching Chang
IPC: H01L29/66 , H01L29/78 , H01L29/10 , H01L21/8238 , H01L27/092
Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
-
公开(公告)号:US11114549B2
公开(公告)日:2021-09-07
申请号:US15909800
申请日:2018-03-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Ming-Ching Chang , Yi-Chun Chen , Yu-Hsien Lin , Li-Wei Yin , Tzu-Wen Pan , Cheng-Chung Chang , Shao-Hua Hsu
IPC: H01L29/66 , H01L29/78 , H01L29/10 , H01L21/8238 , H01L27/092 , H01L21/84 , H01L27/12
Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
-
公开(公告)号:US12132050B2
公开(公告)日:2024-10-29
申请号:US18526062
申请日:2023-12-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Cheng-Chung Chang , Shao-Hua Hsu , Yu-Hsien Lin , Ming-Ching Chang , Li-Wei Yin , Tzu-Wen Pan , Yi-Chun Chen
IPC: H01L21/3065 , H01L21/3213 , H01L21/762 , H01L21/8234 , H01L27/02 , H01L27/088 , H01L29/06 , H01L29/66 , H01L29/78 , H01L21/308 , H01L21/3105 , H01L21/321
CPC classification number: H01L27/0886 , H01L21/3065 , H01L21/32133 , H01L21/76224 , H01L21/76229 , H01L21/823431 , H01L21/823437 , H01L21/823481 , H01L27/0207 , H01L29/0649 , H01L29/66545 , H01L29/7842 , H01L21/3086 , H01L21/31053 , H01L21/3212
Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
-
6.
公开(公告)号:US20240313091A1
公开(公告)日:2024-09-19
申请号:US18671151
申请日:2024-05-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Li-Wei Yin , Tzu-Wen Pan , Cheng-Chung Chang , Shao-Hua Hsu , Yi-Chun Chen , Yu-Hsien Lin , Ming-Ching Chang
IPC: H01L29/66 , H01L21/8238 , H01L21/84 , H01L27/092 , H01L27/12 , H01L29/10 , H01L29/78
CPC classification number: H01L29/66795 , H01L21/823821 , H01L27/0924 , H01L29/1054 , H01L29/785 , H01L21/845 , H01L27/1211
Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
-
公开(公告)号:US20220384269A1
公开(公告)日:2022-12-01
申请号:US17818405
申请日:2022-08-09
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Cheng-Chung Chang , Shao-Hua Hsu , Yu-Hsien Lin , Ming-Ching Chang , Li-Wei Yin , Tzu-Wen Pan , Yi-Chun Chen
IPC: H01L21/8234 , H01L21/762 , H01L27/088
Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
-
公开(公告)号:US10325912B2
公开(公告)日:2019-06-18
申请号:US15797626
申请日:2017-10-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Li-Wei Yin , Tzu-Wen Pan , Yi-Chun Chen , Cheng-Chung Chang , Shao-Hua Hsu , Yu-Hsien Lin , Ming-Ching Chang
IPC: H01L27/02 , H01L29/06 , H01L29/66 , H01L29/78 , H01L21/308 , H01L21/321 , H01L21/762 , H01L27/088 , H01L21/3065 , H01L21/3105 , H01L21/3213 , H01L21/8234
Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
-
公开(公告)号:US12027608B2
公开(公告)日:2024-07-02
申请号:US17325622
申请日:2021-05-20
Inventor: Ryan Chia-Jen Chen , Li-Wei Yin , Tzu-Wen Pan , Cheng-Chung Chang , Shao-Hua Hsu , Yi-Chun Chen , Yu-Hsien Lin , Ming-Ching Chang
IPC: H01L29/66 , H01L21/8238 , H01L27/092 , H01L29/10 , H01L29/78 , H01L21/84 , H01L27/12
CPC classification number: H01L29/66795 , H01L21/823821 , H01L27/0924 , H01L29/1054 , H01L29/785 , H01L21/845 , H01L27/1211
Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
-
公开(公告)号:US20240113112A1
公开(公告)日:2024-04-04
申请号:US18526062
申请日:2023-12-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ryan Chia-Jen Chen , Cheng-Chung Chang , Shao-Hua Hsu , Yu-Hsien Lin , Ming-Ching Chang , Li-Wei Yin , Tzu-Wen Pan , Yi-Chun Chen
IPC: H01L27/088 , H01L21/3065 , H01L21/3213 , H01L21/762 , H01L21/8234 , H01L27/02 , H01L29/06 , H01L29/66 , H01L29/78
CPC classification number: H01L27/0886 , H01L21/3065 , H01L21/32133 , H01L21/76224 , H01L21/76229 , H01L21/823431 , H01L21/823437 , H01L21/823481 , H01L27/0207 , H01L29/0649 , H01L29/66545 , H01L29/7842 , H01L21/3212
Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
-
-
-
-
-
-
-
-
-