公开(公告)号：US11621344B2

公开(公告)日：2023-04-04

申请号：US17065235

申请日：2020-10-07

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Sheng Yun ,  Shao-Ming Yu ,  Tung-Ying Lee ,  Chih-Chieh Yeh

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/786

Abstract: A device includes a semiconductor fin, a first epitaxy structure and a gate stack. The semiconductor fin protrudes from a substrate. The first epitaxy feature laterally surrounds a first portion of the semiconductor fin. The gate stack laterally surrounds a second portion of the semiconductor fin above the first portion of the semiconductor fin, wherein the second portion of the semiconductor fin has a lower surface roughness than the first epitaxy feature.

公开(公告)号：US11133403B2

公开(公告)日：2021-09-28

申请号：US16390172

申请日：2019-04-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： I-Sheng Chen ,  Cheng-Hsien Wu ,  Chih-Chieh Yeh

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/739 ,  H01L29/06 ,  H01L27/088 ,  H01L29/775 ,  H01L21/285

Abstract: A device includes a substrate, a first doping portion, a second doping portion, a channel, a semiconductor film, a high-k layer, and a gate. The first doping portion and the second doping portion are over the substrate. The channel is over the substrate and between the first doping portion and the second doping portion. The semiconductor film is around the channel. The high-k layer is around the semiconductor film. The gate is over the high-k layer.

公开(公告)号：US10978422B2

公开(公告)日：2021-04-13

申请号：US16881675

申请日：2020-05-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wei-Sheng Yun ,  Shao-Ming Yu ,  Chih-Chieh Yeh

IPC: H01L25/04 ,  H01L21/70 ,  H01L21/027 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08

Abstract: A method includes forming a fin structure over a semiconductor substrate; forming a liner covering the fin structure; etching back the liner to expose an upper portion of the fin structure; forming a spacer covering the upper portion of the fin structure; etching the liner to expose a middle portion of the fin structure, wherein the remaining liner covers a lower portion of the fin structure; etching the middle portion of the fin structure; and forming a first source/drain structure surrounding the middle portion of the fin structure.

公开(公告)号：US10930782B2

公开(公告)日：2021-02-23

申请号：US16512016

申请日：2019-07-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Hsien Wu ,  Chih-Chieh Yeh ,  Yee-Chia Yeo

IPC: H01L29/78 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L29/10 ,  H01L21/768 ,  H01L29/04

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a stacked wire structure formed over the substrate. The semiconductor device structure also includes a gate structure formed over a middle portion of the stacked wire structure and a source/drain (S/D) structure formed at two opposite sides of the stacked wire structure. The S/D structure includes a top surface, a sidewall surface, and a rounded corner between the top surface and the sidewall surface.

公开(公告)号：US10355133B2

公开(公告)日：2019-07-16

申请号：US15640303

申请日：2017-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Hsien Wu ,  Chih-Chieh Yeh ,  Yee-Chia Yeo

IPC: H01L29/78 ,  H01L21/768 ,  H01L29/04 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/786 ,  H01L29/10

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a stacked wire structure over a substrate and forming a gate structure across middle portions of the stacked wire structure. A trench can be formed by removing the gate structure, in which a middle portion of the stacked wire structure is exposed. The method further includes removing a portion of the stacked wire structure to form a recess and forming a source/drain (S/D) structure at two opposite sides of the stacked wire structure, where the S/D structure is formed by an epitaxial process and includes a top surface, a sidewall surface, and a rounded corner between the top surface and the sidewall surface.

公开(公告)号：US09735274B2

公开(公告)日：2017-08-15

申请号：US14947650

申请日：2015-11-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Hsien Wu ,  Chih-Chieh Yeh ,  Yee-Chia Yeo

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/768 ,  H01L29/04

CPC classification number: H01L29/785 ,  H01L21/76877 ,  H01L21/823821 ,  H01L29/045 ,  H01L29/1054 ,  H01L29/42392 ,  H01L29/66484 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a stacked wire structure formed over the substrate. The semiconductor device structure also includes a gate structure formed over a middle portion of the stacked wire structure and a source/drain (S/D) structure formed at two opposite sides of the stacked wire structure. The S/D structure includes a top surface, a sidewall surface, and a rounded corner between the top surface and the sidewall surface.