公开(公告)号：US20160056764A1

公开(公告)日：2016-02-25

申请号：US14467075

申请日：2014-08-25

Applicant: Tensorcom, Inc.

Inventor： KhongMeng Tham ,  Huainan Ma ,  Zaw Soe ,  Ricky Lap Kei Cheung

IPC: H03D7/14

CPC classification number: H04B1/0475 ,  H03C2200/0058 ,  H03D3/008 ,  H03D3/009 ,  H03D7/125 ,  H03D7/165 ,  H04B1/04 ,  H04B1/0458 ,  H04B2001/0408

Abstract: LO leakage and Image are common and undesirable effects in typical transmitters. Typically, thirty complex hardware and algorithms are used to calibrate and reduce these two impairments. A single transistor that draws essentially no de current and occupies a very small area, is used to detect the LO leakage and Image Rejection signals. The single transistor operating as a square law device, is used to mix the signals at the input and output ports of the power amplifier (PA). The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.

Abstract translation: LO泄漏和图像在典型的发射器中是常见的和不良影响。 通常，使用三十个复杂的硬件和算法来校准和减少这两个损伤。 基本上没有去电流并占据非常小的面积的单个晶体管用于检测LO泄漏和图像抑制信号。 作为平方律器件工作的单个晶体管用于混合功率放大器（PA）输入和输出端口的信号。 由单个晶体管产生的混合信号可以同时校准LO泄漏和图像抑制。

公开(公告)号：US20150357999A1

公开(公告)日：2015-12-10

申请号：US14828955

申请日：2015-08-18

Applicant: TENSORCOM, INC.

Inventor： Zaw Soe ,  KhongMeng Tham

IPC: H03K3/012 ,  H01Q1/50 ,  H03K17/56

CPC classification number: H03K3/012 ,  G05F3/16 ,  H01Q1/50 ,  H03K17/56 ,  H04B5/0075

Abstract: This invention eliminates the need for “capacitor coupling” or “transformer coupling,” and the associated undesirable parasitic capacitance and inductance associated with these coupling techniques when designing high frequency (˜60 GHz) circuits. At this frequency, the distance between two adjacent stages needs to be minimized. A resonant circuit in series with the power or ground leads is used to isolate a biasing signal from a high frequency signal. The introduction of this resonant circuit allows a first stage to be “directly coupled” to a next stage using a metallic trace. The “direct coupling” technique passes both the high frequency signal and the biasing voltage to the next stage. The “direct coupling” approach overcomes the large die area usage when compared to either the “AC coupling” or “transformer coupling” approach since neither capacitors nor transformers are required to transfer the high frequency signals between stages.

Abstract translation: 当设计高频（〜60GHz）电路时，本发明消除了对“电容器耦合”或“变压器耦合”的需求以及与这些耦合技术相关联的不期望的寄生电容和电感。 在这个频率下，两个相邻阶段之间的距离需要最小化。 与电源或接地引线串联的谐振电路用于将偏置信号与高频信号隔离开来。 该谐振电路的引入允许使用金属迹线将第一级“直接耦合”到下一级。 “直接耦合”技术将高频信号和偏置电压都通过下一级。 与“交流耦合”或“变压器耦合”方法相比，“直接耦合”方法克服了大的管芯面积使用，因为既不需要电容器也不需要变压器来在级之间传输高频信号。

公开(公告)号：US20140035667A1

公开(公告)日：2014-02-06

申请号：US14053189

申请日：2013-10-14

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H03H11/12 ,  H03H3/00

CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

Abstract: Sallen-Key filters require an operational amplifier with a large input impedance and a small output impedance to meet the external filter characteristics. This invention eliminates the need for internal feedback path for stability and increases the gain of a source follower which has characteristics matching the operational amplifier in the Sallen-Key filter. The source follower provides 6 dB of AC voltage gain and is substituted for the operational amplifier in the Sallen-Key filter. The Sallen-Key filter requires a differential configuration to generate all the required signals with their compliments and uses these signals in a feed forward path. Furthermore, since the source follower uses only two n-channel stacked devices, the headroom voltage is maximized to several hundred millivolts for a 1.2V voltage supply in a 40 nm CMOS technology. Thus, the required 880 MHz bandwidth of the Sallen-Key filter can be easily met using the innovative source follower.

Abstract translation: Sallen-Key滤波器需要具有大输入阻抗和小输出阻抗的运算放大器，以满足外部滤波器特性。 本发明消除了对于稳定性的内部反馈路径的需要，并增加了具有与Sallen-Key滤波器中的运算放大器匹配的特性的源极跟随器的增益。 源极跟随器提供6 dB的交流电压增益，并代替Sallen-Key滤波器中的运算放大器。 Sallen-Key滤波器需要差分配置，以产生所有需要的信号，并在前馈路径中使用这些信号。 此外，由于源极跟随器仅使用两个n沟道堆叠器件，因此在40nm CMOS技术中1.2V电压源的裕量电压最大可达数百毫伏。 因此，Sallen-Key滤波器所需的880 MHz带宽可以使用创新的源跟踪器轻松实现。

公开(公告)号：US20170310308A1

公开(公告)日：2017-10-26

申请号：US15646776

申请日：2017-07-11

Applicant: Tensorcom, Inc.,

Inventor： Zaw Soe ,  KhongMeng Tham

IPC: H03K3/012 ,  H03K17/56 ,  H01Q1/50 ,  H04B5/00 ,  G05F3/16

CPC classification number: H03K3/012 ,  G05F3/16 ,  H01Q1/50 ,  H03K17/56 ,  H04B5/0075

Abstract: This invention eliminates the need for “capacitor coupling” or “transformer coupling,” and the associated undesirable parasitic capacitance and inductance associated with these coupling techniques when designing high frequency (˜60 GHz) circuits. At this frequency, the distance between two adjacent stages needs to be minimized. A resonant circuit in series with the power or ground leads is used to isolate a biasing signal from a high frequency signal. The introduction of this resonant circuit allows a first stage to be “directly coupled” to a next stage using a metallic trace. The “direct coupling” technique passes both the high frequency signal and the biasing voltage to the next stage. The “direct coupling” approach overcomes the large die area usage when compared to either the “AC coupling” or “transformer coupling” approach since neither capacitors nor transformers are required to transfer the high frequency signals between stages.

公开(公告)号：US20170126464A1

公开(公告)日：2017-05-04

申请号：US15357566

申请日：2016-11-21

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H04L27/38 ,  H03D7/14 ,  H03F3/45 ,  H03F1/22 ,  H03F3/193 ,  H03F1/42 ,  H03D7/16

CPC classification number: H03F1/42 ,  H03D7/125 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/165 ,  H03F1/223 ,  H03F3/193 ,  H03F3/387 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03F2200/72 ,  H03F2200/75 ,  H04L27/38

Abstract: A receiver comprises a Low Noise Amplifier (LNA) configured to amplify an input signal and a resonant circuit coupled to the LNA. A first switch couples current from the resonant circuit to a first capacitor integrating a first voltage, wherein the first switch is enabled with a clock signal. A second switch couples current from the resonant circuit to a second capacitor integrating a second voltage, wherein the second switch is enabled with an inverse clock signal. A differential amplifier comprises a positive input for receiving the first voltage and a negative input for receiving the second voltage in order to produce a sum and a difference frequency spectrum between a signal spectrum carried within the current and a frequency of the clock signal.

公开(公告)号：US09287836B2

公开(公告)日：2016-03-15

申请号：US14108312

申请日：2013-12-16

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H04B1/16 ,  H03F3/19 ,  H03F3/387 ,  H03F1/22 ,  H03F3/193 ,  H03D7/12 ,  H03D7/14 ,  H03D7/16

CPC classification number: H03F1/42 ,  H03D7/125 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/165 ,  H03F1/223 ,  H03F3/193 ,  H03F3/387 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03F2200/72 ,  H03F2200/75 ,  H04L27/38

Abstract: A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Abstract translation: 引入并描述了以60GHz操作的共源共栅和公共栅极LNA。 对共源共栅源LNA进行模拟，以达到上部器件宽度与较低器件宽度的最佳比例。 共源共栅源LNA的电压输出转换为电流以馈送并将能量施加到混频器级。 这些输入电流信号将与电流相关联的能量直接施加到混频器中的开关电容器中，以最小化系统的总功耗。 LNA电容耦合到I和Q混频器中的混频器开关，并由正交振荡器产生的时钟使能和禁止。 然后，这些信号被差分放大器放大以产生和和差频谱。

公开(公告)号：US08803596B2

公开(公告)日：2014-08-12

申请号：US14053189

申请日：2013-10-14

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H03H11/12 ,  H03F3/45 ,  H03F3/50 ,  H03H3/00 ,  H03F3/195 ,  H03F3/30

CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

Abstract: Sallen-Key filters require an operational amplifier with a large input impedance and a small output impedance to meet the external filter characteristics. This invention eliminates the need for internal feedback path for stability and increases the gain of a source follower which has characteristics matching the operational amplifier in the Sallen-Key filter. The source follower provides 6 dB of AC voltage gain and is substituted for the operational amplifier in the Sallen-Key filter. The Sallen-Key filter requires a differential configuration to generate all the required signals with their complements and uses these signals in a feed forward path. Furthermore, since the source follower uses only two n-channel stacked devices, the headroom voltage is maximized to several hundred millivolts for a 1.2V voltage supply in a 40 nm CMOS technology. Thus, the required 880 MHz bandwidth of the Sallen-Key filter can be easily met using the innovative source follower.

Abstract translation: Sallen-Key滤波器需要具有大输入阻抗和小输出阻抗的运算放大器，以满足外部滤波器特性。 本发明消除了对于稳定性的内部反馈路径的需要，并增加了具有与Sallen-Key滤波器中的运算放大器匹配的特性的源极跟随器的增益。 源极跟随器提供6 dB的交流电压增益，并代替Sallen-Key滤波器中的运算放大器。 Sallen-Key滤波器需要一个差分配置，以便产生所有需要的信号及其补码，并在前馈路径中使用这些信号。 此外，由于源极跟随器仅使用两个n沟道堆叠器件，因此在40nm CMOS技术中1.2V电压源的裕量电压最大可达数百毫伏。 因此，Sallen-Key滤波器所需的880 MHz带宽可以使用创新的源跟踪器轻松实现。

公开(公告)号：US20140097894A1

公开(公告)日：2014-04-10

申请号：US14108312

申请日：2013-12-16

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H03F3/387

CPC classification number: H03F1/42 ,  H03D7/125 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/165 ,  H03F1/223 ,  H03F3/193 ,  H03F3/387 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03F2200/72 ,  H03F2200/75 ,  H04L27/38

Abstract: A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Abstract translation: 引入并描述了以60GHz操作的共源共栅和公共栅极LNA。 对共源共栅源LNA进行模拟，以达到上部器件宽度与较低器件宽度的最佳比例。 共源共栅源LNA的电压输出转换为电流以馈送并将能量施加到混频器级。 这些输入电流信号将与电流相关联的能量直接施加到混频器中的开关电容器中，以最小化系统的总功耗。 LNA电容耦合到I和Q混频器中的混频器开关，并由正交振荡器产生的时钟使能和禁止。 然后，这些信号被差分放大器放大以产生和和差频谱。

公开(公告)号：US08674755B2

公开(公告)日：2014-03-18

申请号：US13916535

申请日：2013-06-12

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H03F3/45

CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

Abstract: A differential amplifier comprising a first upper device and a first lower device series coupled between two power supplies and a second upper device and a second lower device series coupled between the two power supplies. A first DC voltage enables the first upper device and the second upper device and a second DC voltage regulates current flow in the first lower device and the second lower device. An AC signal component is coupled to the first upper device and the second lower device while the AC signal complement is coupled to the first lower device and the second upper device. Separate RC networks couple the AC signals to their respective device. A first and second output signal forms between the upper device and the lower device, respectively. All the devices are same channel type.

Abstract translation: 一种差分放大器，包括耦合在两个电源之间的第一上部装置和第一下部装置系列，以及耦合在两个电源之间的第二上部装置和第二下部装置。 第一直流电压使得第一上部装置和第二上部装置能够和第二直流电压调节第一下部装置和第二下部装置中的电流。 当AC信号补码耦合到第一下部装置和第二上部装置时，AC信号分量耦合到第一上部装置和第二下部装置。 单独的RC网络将AC信号耦合到其相应的设备。 分别在上部装置和下部装置之间形成第一和第二输出信号。 所有设备的通道类型相同。

公开(公告)号：US20130285746A1

公开(公告)日：2013-10-31

申请号：US13916535

申请日：2013-06-12

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H03F3/45

CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

Abstract: A differential amplifier comprising a first upper device and a first lower device series coupled between two power supplies and a second upper device and a second lower device series coupled between the two power supplies. A first DC voltage enables the first upper device and the second upper device and a second DC voltage regulates current flow in the first lower device and the second lower device. An AC signal component is coupled to the first upper device and the second lower device while the AC signal complement is coupled to the first lower device and the second upper device. Separate RC networks couple the AC signals to their respective device. A first and second output signal forms between the upper device and the lower device, respectively. All the devices are same channel type.

Abstract translation: 一种差分放大器，包括耦合在两个电源之间的第一上部装置和第一下部装置系列，以及耦合在两个电源之间的第二上部装置和第二下部装置。 第一直流电压使得第一上部装置和第二上部装置能够和第二直流电压调节第一下部装置和第二下部装置中的电流。 当AC信号补码耦合到第一下部装置和第二上部装置时，AC信号分量耦合到第一上部装置和第二下部装置。 单独的RC网络将AC信号耦合到其相应的设备。 分别在上部装置和下部装置之间形成第一和第二输出信号。 所有设备的通道类型相同。