-
公开(公告)号：US07408466B2
公开(公告)日：2008-08-05
申请号：US11412170
申请日：2006-04-25
IPC分类号： G08B13/14
CPC分类号： G06K7/0008
摘要： Systems, software, devices, and methods are described for an RFID reader system to communicate with RFID tags. RF energy encountered in conjunction with using a selected channel is detected and used to adjust a waveform shaping parameter. RF waves can be transmitted from the reader to the RFID tags and RF waves can be backscattered from the RFID tags. At least some of the RF waves transmitted to or backscattered from the RFID tags have a waveform with a shape according to the adjusted waveform shaping parameter.
摘要翻译： 描述了RFID读取器系统与RFID标签通信的系统，软件，设备和方法。 检测并结合使用所选择的信道遇到的RF能量来调整波形整形参数。 RF波可以从读取器发送到RFID标签，并且RF波可以从RFID标签反向散射。 从RFID标签发射或反向散射的至少一些RF波具有根据经调整的波形整形参数的形状的波形。
-
公开(公告)号：US07388420B2
公开(公告)日：2008-06-17
申请号：US10814866
申请日：2004-03-30
IPC分类号： H01H37/76
CPC分类号： G11C16/0441 , G11C7/20 , G11C14/00 , G11C16/045
摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.
摘要翻译： 可重写电子熔丝包括耦合到一个或多个非易失性存储元件的锁存器和/或逻辑门。 非易失性存储器元件被配置为被编程为能够使相关联的电子电路稳定到预定状态的存储器值，因为上电或复位信号被施加到保险丝。 虽然不是必需的，但是在可重写电子熔丝中使用的非易失性存储元件可以包括浮栅晶体管。 存储在给定浮栅晶体管的浮置栅极上的电荷量确定存储器值，并且因此确定保险丝上电或复位时保险丝熔断的状态。
-
公开(公告)号：US07242614B2
公开(公告)日：2007-07-10
申请号：US10813907
申请日：2004-03-30
CPC分类号： G11C16/0441 , G11C14/00 , G11C16/045 , H01L27/105 , H01L27/115 , H01L29/7883 , H03K3/02335
摘要： Rewriteable electronic fuses include latches and/or logic gates coupled to one or more nonvolatile memory elements. The nonvolatile memory elements are configured to be programmed to memory values capable of causing associated electronic circuits to settle to predetermined states as power-up or reset signals are applied to the fuses. Although not required, the nonvolatile memory elements used in the rewriteable electronic fuses may comprise floating-gate transistors. An amount of charge stored on the floating gate of a given floating-gate transistor determines the memory value and, consequently, the state to which a fuse settles upon power-up or reset of the fuse.
-
24.发明授权Method and apparatus for trimming high-resolution digital-to-analog converter 有权用于微调高分辨率数模转换器的方法和装置公开(公告)号：US06664909B1
公开(公告)日：2003-12-16
申请号：US09929652
申请日：2001-08-13
申请人： John D. Hyde , Miguel E. Figueroa , Todd E. Humes , Christopher J. Diorio , Terry D. Hass , Chad A. Lindhorst
发明人： John D. Hyde , Miguel E. Figueroa , Todd E. Humes , Christopher J. Diorio , Terry D. Hass , Chad A. Lindhorst
IPC分类号： H03M166
CPC分类号： H03M1/1057 , H03M1/742
摘要： A method and apparatus for trimming a high-resolution digital-to-analog converter (DAC) utilizes floating-gate synapse transistors to trim the current sources in the DAC by providing a trimmable current source. Fowler-Nordheim electron tunneling and hot electron injection are the mechanisms used to vary the amount of charge on the floating gate. Since floating gate devices store charge essentially indefinitely, no continuous trimming mechanism is required, although one could be implemented if desired. By trimming the current sources with high accuracy, a DAC can be built with a much higher resolution and with smaller size than that provided by intrinsic device matching.
摘要翻译： 用于修整高分辨率数模转换器（DAC）的方法和装置利用浮栅突触晶体管来通过提供可调整的电流源来修整DAC中的电流源。 Fowler-Nordheim电子隧道和热电子注入是用于改变浮动栅极上的电荷量的机制。 由于浮动栅极器件基本上无限期地存储电荷，因此不需要连续的修整机制，但是如果需要可以实现。 通过以高精度修剪电流源，可以以比本机设备匹配提供的更高的分辨率和更小的尺寸构建DAC。
-
公开(公告)号：US08122307B1
公开(公告)日：2012-02-21
申请号：US11768974
申请日：2007-06-27
CPC分类号： G11C29/24 , G11C17/146 , G11C17/18 , G11C29/027
摘要： One Time Programmable (OTP) memory structures and methods for pretesting the support circuitry are provided. A group of dedicated test cells associated with one or more groups of regular OTP cells are used to test the support circuitry for the regular OTP cells. The dedicated cells are programmed and read. The read values are compared to the programmed values or expected values. As a result of the comparison, failing memories may be designated “Not Usable”, while regular OTP cells of passing memories can be programmed for their purpose resulting in elimination of wasted memories during test.
摘要翻译： 提供一次可编程（OTP）存储器结构和用于预测测支持电路的方法。 与一个或多个常规OTP单元组相关联的一组专用测试单元用于测试常规OTP单元的支持电路。 专用单元格被编程和读取。 读取值与编程值或预期值进行比较。 作为比较的结果，故障存储器可以被指定为“不可用”，而通过存储器的常规OTP单元可以被编程用于其目的，导致在测试期间消除浪费的存储器。
-
26.发明授权Method and apparatus for programming single-poly pFET-based nonvolatile memory cells 有权用于编程基于单多晶硅pFET的非易失性存储单元的方法和装置公开(公告)号：US07411828B2
公开(公告)日：2008-08-12
申请号：US11528150
申请日：2006-09-26
IPC分类号： G11C11/34
CPC分类号： G11C16/3468 , G11C16/3404 , G11C16/3472 , G11C16/3477
摘要： Methods and apparatuses for programming a single-poly pFET-based nonvolatile memory cell bias the cell so that band-to-band tunneling (BTBT) is induced and electrons generated by the BTBT are injected onto a floating gate of the cell. Following a predetermined event, the single-poly pFET is biased to induce impact-ionized hot-electron injection (IHEI). The predetermined event may be, for example, the expiration of a predetermined time period or a determination that a channel has been formed by the BTBT injection process that is sufficiently conducting to support IHEI. Employing BTBT permits a previously overerased or stuck bit to be “unstuck” or “removed” and thus be made usable (i.e., able to be programmed) again.
摘要翻译： 用于编程基于单多晶硅pFET的非易失性存储单元的方法和装置偏置该单元，从而导致带间隧穿（BTBT），并且由BTBT产生的电子注入到该单元的浮动栅极上。 在预定事件之后，单多晶硅pFET被偏置以引起冲击电离热电子注入（IHEI）。 预定事件可以是例如预定时间段的到期或通过充分进行支持IHEI的BTBT注入处理形成的信道的确定。 使用BTBT允许先前已过度或卡住的位被“解锁”或“移除”，并因此被再次使用（即能够被编程）。
-
公开(公告)号：US07391329B2
公开(公告)日：2008-06-24
申请号：US11412172
申请日：2006-04-25
IPC分类号： G08B13/14
CPC分类号： G06K7/0008 , G06K19/0723
摘要： Systems, software, devices, and methods are described for an RFID reader system to communicate with RFID tags. RF energy encountered in conjunction with using a selected channel is detected and used to adjust a waveform shaping parameter in combination with a performance requirement. RF waves can be transmitted from the reader to the RFID tags and RF waves can be backscattered from the RFID tags. At least some of the RF waves transmitted to or backscattered from the RFID tags have a waveform with a shape according to the adjusted waveform shaping parameter.
摘要翻译： 描述了RFID读取器系统与RFID标签通信的系统，软件，设备和方法。 检测并结合使用所选通道遇到的RF能量，并结合演奏要求调整波形整形参数。 RF波可以从读取器发送到RFID标签，并且RF波可以从RFID标签反向散射。 从RFID标签发射或反向散射的至少一些RF波具有根据经调整的波形整形参数的形状的波形。
-
公开(公告)号：US07263001B2
公开(公告)日：2007-08-28
申请号：US11084213
申请日：2005-03-17
申请人： Bin Wang , Christopher J. Diorio , Todd E. Humes
发明人： Bin Wang , Christopher J. Diorio , Todd E. Humes
IPC分类号： G11C11/34
CPC分类号： G11C16/24
摘要： NVM arrays include rows and columns of NVM cells comprising a floating gate, a programming element, and a logic storage element. During a programming or erase mode, the floating gate of each cell is charged to a predetermined level. At the beginning of a read mode, all storage elements are pre-charged to a high supply voltage level. Following the pre-charge, selected cells are read to determine stored bit values. A charge status of the floating gate of each cell determines whether the storage element is turned on and the pre-charge voltage is pulled down corresponding to a bit value.
摘要翻译： NVM阵列包括包括浮动栅极，编程元件和逻辑存储元件的NVM单元的行和列。 在编程或擦除模式期间，每个单元的浮置栅极被充电到预定的电平。 在读取模式开始时，所有存储元件都被预先充电到高电源电压。 在预充电之后，读取所选择的单元以确定存储的位值。 每个单元的浮动栅极的充电状态确定存储元件是否导通，并且预充电电压相应于位值被下拉。
-
公开(公告)号：US07098498B2
公开(公告)日：2006-08-29
申请号：US10914968
申请日：2004-08-09
CPC分类号： H01L29/66825 , H01L27/115 , H01L27/11521 , H01L27/11558 , H01L29/7883 , H01L29/7885
摘要： Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a floating-gate memory. Various pFET floating-gate structures use a combination of this mechanism and electron tunneling to implement nonvolatile analog memory, nonvolatile digital memory, or on-line learning in silicon. The memory is nonvolatile because the devices use electrically isolated floating gates to store electronic charge. The devices enable on-line learning because the electron injection and tunneling mechanisms that write the memory can occur during normal device operation. The memory updates and learning are bidirectional because the injection and tunneling mechanisms add and remove electrons from the floating gate, respectively. Because the memory updates depend on both the stored memory and the pFETs terminal voltages, and because they are bidirectional, the devices can implement on-line learning functions.
-
公开(公告)号：US06965142B2
公开(公告)日：2005-11-15
申请号：US10192773
申请日：2002-07-09
IPC分类号： G11C11/54 , G11C11/34 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/66825 , H01L27/115 , H01L27/11521 , H01L27/11558 , H01L29/7883 , H01L29/7885
摘要： Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a floating-gate memory. Various pFET floating-gate structures use a combination of this mechanism and electron tunneling to implement nonvolatile analog memory, nonvolatile digital memory, or on-line learning in silicon. The memory is nonvolatile because the devices use electrically isolated floating gates to store electronic charge. The devices enable on-line learning because the electron injection and tunneling mechanisms that write the memory can occur during normal device operation. The memory updates and learning are bidirectional because the injection and tunneling mechanisms add and remove electrons from the floating gate, respectively. Because the memory updates depend on both the stored memory and the pFETs terminal voltages, and because they are bidirectional, the devices can implement on-line learning functions.
-
-
-
-
-
-
-
-
-
搜索结果
50 条记录 (耗时 0.035 秒)
